Cypress Semiconductor FX2LP Informações Técnicas descarregar pdf (Página 295)

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Chapter 14. Timers/Counters and Serial Interface Page 14-3

14.2.2.1 Mode 0, 13-Bit Timer/Counter — Timer 0 and Timer 1

Mode 0 operation is illustrated in Figure 14-1.

In mode 0, the timer is configured as a 13-bit counter that uses bits 0-4 of TL0 (or TL1) and all 8

bits of TH0 (or TH1). The timer enable bit (TR0/TR1) in the TCON SFR starts the timer. The C/T

Bit

selects the timer/counter clock source: either CLKOUT or the T0/T1

pins

The timer counts transitions from the selected source as long as the GATE Bit is 0, or the GATE Bit

is 1 and the corresponding interrupt pin (INT0

or INT1) is 1.

When the 13-bit count increments from 0x1FFF (all ones), the counter rolls over to all zeros, the

TF0 (or TF1) Bit is set in the TCON SFR, and the T0OUT (or T1OUT) pin goes high for one clock

cycle.

The upper 3 bits of TL0 (or TL1) are indeterminate in mode 0 and should be ignored.

Figure 14-1. Timer 0/1 - Modes 0 and 1

14.2.2.2 Mode 1, 16-Bit Timer/Counter — Timer 0 and Timer 1

In mode 1, the timer is configured as a 16-bit counter. As illustrated in Figure 14-1, all 8 bits of the

LSB Register (TL0 or TL1) are used. The counter rolls over to all zeros when the count increments

from 0xFFFF. Otherwise, mode 1 operation is the same as mode 0.

TL0 (or TL1)

Divide by 12

Divide by 4

CLKOUT

T0 (or T1) pin

TR0 (or TR1)

GATE

INT0 (or

INT1

) pin

TF0 (or TF1)

INT

TH0 (or TH1)

T0M (or T1M)

Mode 0

Mode 1

To Serial Port

(Timer 1 only)

CLK

C/ T

1 2 ... 290 291 292 293 294 295 296 297 298 299 300 ... 459 460

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