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EZ-USB FX2 Technical Reference Manual
Page 5-2 EZ-USB FX2 Technical Reference Manual v2.1
5.2.1 The Lower 128
The Lower 128 occupies Internal Data RAM locations 0x00-0x7F. All of the Lower 128 may be
accessed as general-purpose RAM, using either direct or indirect addressing (for more information
on the FX2 addressing modes, see Chapter 12 "Instruction Set").
Two segments of the Lower 128 may additionally be accessed in other ways.
Locations 0x00-0x1F comprise four banks of 8 registers each, numbered R0 through R7.
The current bank is selected via the “register-select” bits (RS1:RS0) in the PSW special-
function register; code which references registers R0-R7 will access them only in the cur-
rently-selected bank.
Locations 0x20-0x2F are bit-addressable. Each of the 128 bits in this segment may be
individually addressed, either by its bit address (0x00 to 0x7F) or by reference to the byte
which contains it (0x20.0 to 0x2F.7).
5.2.2 The Upper 128
The Upper 128 occupies Internal Data RAM locations 0x80-0xFF; all 128 bytes may be accessed
as general-purpose RAM, but only by using indirect addressing (for more information on the FX2
addressing modes, see Chapter 12 "Instruction Set").
Since the FX2’s stack is internally accessed using indirect addressing, it’s a good idea to put the
stack in the Upper 128; this frees the more-efficiently-accessed Lower 128 for General-Purpose
use.
5.2.3 SFR (Special Function Register) Space
The SFR Space, like the Upper 128, is accessed at Internal Data RAM locations 0x80-0xFF. The
FX2 keeps SFR Space separate from the Upper 128 by using different addressing modes to
access the two regions: SFRs may only be accessed using
direct
addressing, and the Upper 128
may only be accessed using
indirect
addressing.
The SFR Space contains FX2 control and status registers; an overview is in Section 11.12, "Spe-
cial Function Registers (SFR)", and a full description of all the SFRs is in Chapter 15 "Registers".
The sixteen SFRs at locations 0x80, 0x88, ...., 0xF0, 0xF8 are bit-addressable. Each of the 128
bits in these registers may be individually addressed, either by its bit address (0x80 to 0xFF) or by
reference to the byte which contains it (e.g., 0x80.0, 0xC8.7, etc.).
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