Cypress Semiconductor FX2LP Informações Técnicas

Cypress Semiconductor 3901 North First Street San Jose, CA 95134 Tel.: (800) 858-1810 (toll-free in the U.S.) (408) 943-2600www.cypress.com EZ-

viiiTable of Contents(Table of Contents) 14.3.3 Mode 0...

EZ-USB FX2 Technical Reference ManualPage 4-10 EZ-USB FX2 Technical Reference Manual v2.1Figure 4-1. USB InterruptsReferring to the logic inside the d

Chapter 4. Interrupts Page 4-11If Autovectoring is enabled, the INT2VEC byte replaces the contents of address 0x0045 in the FX2’s program memory. Thi

EZ-USB FX2 Technical Reference ManualPage 4-12 EZ-USB FX2 Technical Reference Manual v2.1Figure 4-2 illustrates a typical USB ISR for endpoint 2-IN.Fi

Chapter 4. Interrupts Page 4-13SUTOK and SUDAV are supplied to the FX2 by CONTROL endpoint zero. The first portion of a USB CONTROL transfer is the S

EZ-USB FX2 Technical Reference ManualPage 4-14 EZ-USB FX2 Technical Reference Manual v2.14.4.2.7 Endpoint InterruptsThese interrupts are asserted whe

Chapter 4. Interrupts Page 4-154.4.2.10 ERRLIMIT InterruptThis interrupt is asserted when the USB error-limit counter has exceeded the preset error

EZ-USB FX2 Technical Reference ManualPage 4-16 EZ-USB FX2 Technical Reference Manual v2.1Table 4-13. A Typical USB-Interrupt Jump TableTable Offset In

Chapter 4. Interrupts Page 4-174.5.1 USB Autovector CodingTo employ autovectoring for the USB interrupt:1. Insert a jump instruction at 0x0043 to a

EZ-USB FX2 Technical Reference ManualPage 4-18 EZ-USB FX2 Technical Reference Manual v2.14.6 I²C-Compatible Bus InterruptFigure 4-6. I²C-Compatible B

Chapter 4. Interrupts Page 4-194.7 FIFO/GPIF Interrupt (INT4)Just as the USB Interrupt is shared among 27 individual USB-interrupt sources, the FIFO

Table of Contentsix(Table of Contents) 15.7.4 USB Interrupt Enable/Request ...

EZ-USB FX2 Technical Reference ManualPage 4-20 EZ-USB FX2 Technical Reference Manual v2.1The registers associated with the individual FIFO/GPIF interr

Chapter 4. Interrupts Page 4-21As shown in Table 4-16, the jump table contains a series of jump instructions, one for each individ-ual FIFO/GPIF Inte

EZ-USB FX2 Technical Reference ManualPage 4-22 EZ-USB FX2 Technical Reference Manual v2.1Figure 4-7. The FIFO/GPIF Autovector Mechanism in ActionFigur

Chapter 5. Memory Page 5-1Chapter 5 Memory5.1 IntroductionMemory organization in the FX2 is similar, but not identical, to that of the standard 8051.

EZ-USB FX2 Technical Reference ManualPage 5-2 EZ-USB FX2 Technical Reference Manual v2.15.2.1 The Lower 128The Lower 128 occupies Internal Data RAM l

Chapter 5. Memory Page 5-35.3 External Program Memory and External Data MemoryThe standard 8051 employs a Harvard architecture for its External memor

EZ-USB FX2 Technical Reference ManualPage 5-4 EZ-USB FX2 Technical Reference Manual v2.1Note that only the data-memory space is reserved; program memo

Chapter 5. Memory Page 5-55.4 FX2 Memory MapsFigure 5-2. FX2 External Program/Data Memory Map, EA=0Figure 5-2 illustrates the memory map of the 128-pi

EZ-USB FX2 Technical Reference ManualPage 5-6 EZ-USB FX2 Technical Reference Manual v2.1On-chip FX2 memory consists of three RAM regions: • 0x0000-0x1

Chapter 5. Memory Page 5-7Figure 5-3. FX2 External Program/Data Memory Map, EA=1 Figure 5-3 illustrates the 128-pin FX2 memory map when the EA pin is

xTable of Contents(Table of Contents) 15.11.17 Endpoint 4 and 8 Slave FIFO Byte Count High...15-7

EZ-USB FX2 Technical Reference ManualPage 5-8 EZ-USB FX2 Technical Reference Manual v2.1Be careful to check the access time of external Flash or other

Chapter 5. Memory Page 5-95.6 On-Chip Data Memory at 0xE000-0xFFFFFigure 5-4. On-Chip Data Memory at 0xE000-0xFFFFFigure 5-4 shows the memory map for

EZ-USB FX2 Technical Reference ManualPage 5-10 EZ-USB FX2 Technical Reference Manual v2.1

Chapter 6. Power Management Page 6-1Chapter 6 Power Management6.1 IntroductionThe USB host can suspend a device to put it into a power-down mode. Wh

EZ-USB FX2 Technical Reference Manual Page 6-2 EZ-USB FX2 Technical Reference Manual v2.1The FX2 enters and exits its Idle state independent of USB ac

Chapter 6. Power Management Page 6-36.2 USB SuspendFigure 6-2. USB Suspend sequenceA USB device recognizes a SUSPEND request as three milliseconds o

EZ-USB FX2 Technical Reference Manual Page 6-4 EZ-USB FX2 Technical Reference Manual v2.1FX2 firmware responds to the SUSPEND interrupt by taking the

Chapter 6. Power Management Page 6-5Once in the low-power mode, there are three ways to wake up the FX2:• USB activity on the FX2’s DPLUS pin• Asserti

EZ-USB FX2 Technical Reference Manual Page 6-6 EZ-USB FX2 Technical Reference Manual v2.1The Wakeup Interrupt Service Routine clears the interrupt req

Chapter 6. Power Management Page 6-7functions, the PA3 and WU2 functions are simultaneously active. However, the WU2 function has no effect unless ena

xiiiList of Figures Figure 1-1. USB Packets ...

EZ-USB FX2 Technical Reference Manual Page 6-8 EZ-USB FX2 Technical Reference Manual v2.1

Chapter 7. Resets Page 7-1Chapter 7 Resets7.1 IntroductionThe FX2 chip has two internal resets:• Power-On Reset (POR), controlled by the RESET pin, w

EZ-USB FX2 Technical Reference ManualPage 7-2 EZ-USB FX2 Technical Reference Manual v2.17.2 Power-On Reset (POR)An active-low input pin (RESET) reset

Chapter 7. Resets Page 7-37.3 Releasing the CPU ResetRegister bit CPUCS.0 resets the CPU. This bit is set to 1 at power-on, initially holding the CPU

EZ-USB FX2 Technical Reference ManualPage 7-4 EZ-USB FX2 Technical Reference Manual v2.1• No “C0/C2” EEPROM is detected on the I²C-compatible bus.Unde

Chapter 7. Resets Page 7-5Note that the RENUM bit is unchanged after a USB bus reset. Therefore, if a device has ReNu-merated™ and loaded a new person

EZ-USB FX2 Technical Reference ManualPage 7-6 EZ-USB FX2 Technical Reference Manual v2.1

Chapter 8. Access to Endpoint Buffers Page 8-1Chapter 8 Access to Endpoint Buffers8.1 IntroductionUSB data enters and exits FX2 via endpoint buffers.

EZ-USB FX2 Technical Reference ManualPage 8-2 EZ-USB FX2 Technical Reference Manual v2.1control of the FIFO interfaces described in Chapters 9 and 10,

Chapter 8. Access to Endpoint Buffers Page 8-38.4 How the CPU Configures the EndpointsEndpoints are configured via the six registers shown in Table 8

xiv List of Figures(List of Figures) Figure 6-2. USB Suspend sequence ...

EZ-USB FX2 Technical Reference ManualPage 8-4 EZ-USB FX2 Technical Reference Manual v2.1– 01 = invalid– 10 = double (default)–11 = triple“Buffering” r

Chapter 8. Access to Endpoint Buffers Page 8-5For example, if EP2 is configured for triple-buffered 1024-byte operation, the firmware should access EP

EZ-USB FX2 Technical Reference ManualPage 8-6 EZ-USB FX2 Technical Reference Manual v2.1HSNAK HSNAK is automatically set to 1 whenever the SETUP token

Chapter 8. Access to Endpoint Buffers Page 8-78.6.1.2 EP0BCH and EP0BCLThese are the byte count registers for bytes sent as the optional data stage o

EZ-USB FX2 Technical Reference ManualPage 8-8 EZ-USB FX2 Technical Reference Manual v2.18.6.1.4 EP01STATThe BUSY bits in EP0CS, EP1OUTCS, and EP1INCS

Chapter 8. Access to Endpoint Buffers Page 8-9STALLFirmware sets STALL=1 to instruct the FX2 to return the STALL PID (instead of ACK or NAK) in respon

EZ-USB FX2 Technical Reference ManualPage 8-10 EZ-USB FX2 Technical Reference Manual v2.18.6.2 Registers That Control EP2, EP4, EP6, EP8In order to a

Chapter 8. Access to Endpoint Buffers Page 8-11These registers do not affect full-speed (12 Mbps) operation; full-speed isochronous transfers are alwa

EZ-USB FX2 Technical Reference ManualPage 8-12 EZ-USB FX2 Technical Reference Manual v2.1transfer logic. As soon as one buffer becomes available, FULL

Chapter 8. Access to Endpoint Buffers Page 8-13the packet to the outside interface (the “output FIFO”), or discard it. The firmware might, for exam-pl

List of Figures xv(List of Figures) Figure 9-37. TD_Poll Example, AUTOIN = 1 ...

EZ-USB FX2 Technical Reference ManualPage 8-14 EZ-USB FX2 Technical Reference Manual v2.18.6.3.1 IBNIE, IBNIRQ, NAKIE, NAKIRQThese registers contain

Chapter 8. Access to Endpoint Buffers Page 8-15PINGPING is the “flip side” of IBN; it’s used for high speed (480 Mbits/sec) BULK OUT transfers.When op

EZ-USB FX2 Technical Reference ManualPage 8-16 EZ-USB FX2 Technical Reference Manual v2.1For the small endpoints (EP0 and EP1IN/OUT), these conditions

Chapter 8. Access to Endpoint Buffers Page 8-17• After a configuration changes (i.e., after the host issues a Set Configuration request).• After an in

EZ-USB FX2 Technical Reference ManualPage 8-18 EZ-USB FX2 Technical Reference Manual v2.1The Setup Data Pointer automates this process of returning IN

Chapter 8. Access to Endpoint Buffers Page 8-198.7.1 Transfer LengthWhen the host makes any EP0IN request, the FX2 respects the following two length

EZ-USB FX2 Technical Reference ManualPage 8-20 EZ-USB FX2 Technical Reference Manual v2.1Most of the Autopointer registers are in SFR Space for quick

Chapter 9. Slave FIFOs Page 9-1Chapter 9 Slave FIFOs9.1 IntroductionAlthough some FX2-based devices may use the FX2’s CPU to process USB data directl

EZ-USB FX2 Technical Reference ManualPage 9-2 EZ-USB FX2 Technical Reference Manual v2.19.2 HardwareFigure 9-1 illustrates the four slave FIFOs. The

Chapter 9. Slave FIFOs Page 9-39.2.1 Slave FIFO PinsThe FX2 comes out of reset with its I/O pins configured in “Ports” mode, not “Slave FIFO” mode. T

xvi List of Figures(List of Figures) Figure 10-30. FIFO-Read w/ AUTOIN = 0, Committing Packets via INPKTEND w/SKIP=0 ...10-47 Figure 10-31

EZ-USB FX2 Technical Reference ManualPage 9-4 EZ-USB FX2 Technical Reference Manual v2.19.2.2 FIFO Data Bus (FD)The FIFO data bus, FD[x:0], can be ei

Chapter 9. Slave FIFOs Page 9-5Figure 9-5. 16-bit Mode Slave FIFOs, WORDWIDE=19.2.3 Interface Clock (IFCLK)The slave FIFO interface can be clocked fr

EZ-USB FX2 Technical Reference ManualPage 9-6 EZ-USB FX2 Technical Reference Manual v2.1Figure 9-6. IFCLK ConfigurationFigure 9-7. Satisfying Setup Ti

Chapter 9. Slave FIFOs Page 9-7equally useful for either type of endpoint (it can, for instance, give advance warning that an OUT endpoint is almost e

EZ-USB FX2 Technical Reference ManualPage 9-8 EZ-USB FX2 Technical Reference Manual v2.19.2.5 Control Pins (SLOE, SLRD, SLWR, PKTEND, FIFOADR[1:0])Th

Chapter 9. Slave FIFOs Page 9-9 PKTEND:An external master asserts the PKTEND pin to commit an IN packet to USB regardless of the packet’s length. PKTE

EZ-USB FX2 Technical Reference ManualPage 9-10 EZ-USB FX2 Technical Reference Manual v2.19.2.6 Slave FIFO Chip Select (SLCS) The “Slave FIFO Chip Sel

Chapter 9. Slave FIFOs Page 9-11Figure 9-11. State Machine Example: Synchronous FIFO WritesFigure 9-12. Timing Example: Synchronous FIFO Writes, Wavef

EZ-USB FX2 Technical Reference ManualPage 9-12 EZ-USB FX2 Technical Reference Manual v2.1Figure 9-13. Timing Example: Synchronous FIFO Writes, Wavefor

Chapter 9. Slave FIFOs Page 9-139.2.8 Implementing Synchronous Slave FIFO ReadsFigure 9-15. Interface Pins Example: Synchronous FIFO ReadsTypically,

List of Figures xvii(List of Figures) Figure 14-2. Timer 0/1 - Mode 2 ...

EZ-USB FX2 Technical Reference ManualPage 9-14 EZ-USB FX2 Technical Reference Manual v2.1Figure 9-17. Timing Example: Synchronous FIFO Reads, Waveform

Chapter 9. Slave FIFOs Page 9-159.2.9 Implementing Asynchronous Slave FIFO WritesFigure 9-19. Interface Pins Example: Asynchronous FIFO WritesTypical

EZ-USB FX2 Technical Reference ManualPage 9-16 EZ-USB FX2 Technical Reference Manual v2.1Figure 9-21. Timing Example: Asynchronous FIFO WritesIFCLKFAD

Chapter 9. Slave FIFOs Page 9-179.2.10 Implementing Asynchronous Slave FIFO ReadsFigure 9-22. Interface Pins Example: Asynchronous FIFO ReadsTypicall

EZ-USB FX2 Technical Reference ManualPage 9-18 EZ-USB FX2 Technical Reference Manual v2.1Figure 9-24. Timing Example: Asynchronous FIFO ReadsIFCLKFADD

Chapter 9. Slave FIFOs Page 9-199.3 FirmwareThis section describes the interface between FX2 firmware and the FIFOs. More information is available in

EZ-USB FX2 Technical Reference ManualPage 9-20 EZ-USB FX2 Technical Reference Manual v2.1Figure 9-25. EPxFIFOBUF Registers9.3.2 EPx MemoriesThe slave

Chapter 9. Slave FIFOs Page 9-21 Figure 9-26. EPx Memories9.3.3 Slave FIFO Programmable-Level Flag (PF)Each FIFO’s programmable-level flag (PF) asser

EZ-USB FX2 Technical Reference ManualPage 9-22 EZ-USB FX2 Technical Reference Manual v2.19.3.4 Auto-In / Auto-Out ModesThe FX2 FIFOs can be configure

Chapter 9. Slave FIFOs Page 9-23Figure 9-29. TD_Init Example: Configuring AUTOIN = 19.3.5 CPU Access to OUT Packets, AUTOOUT = 1The FX2’s CPU is not

xviii List of Figures(List of Figures) Figure 15-26. Endpoint 4 and 8 AUTOIN Packet Length High ...

EZ-USB FX2 Technical Reference ManualPage 9-24 EZ-USB FX2 Technical Reference Manual v2.19.3.6 CPU Access to OUT Packets, AUTOOUT = 0In some systems,

Chapter 9. Slave FIFOs Page 9-25Figure 9-32. Skip, Commit, or Source (AUTOOUT=0)Figure 9-33. TD_Poll Example, AUTOOUT=0, Commit PacketFigure 9-34. TD_

EZ-USB FX2 Technical Reference ManualPage 9-26 EZ-USB FX2 Technical Reference Manual v2.1Figure 9-35. TD_Poll Example, AUTOOUT=0, SourceIf an uncommit

Chapter 9. Slave FIFOs Page 9-27Figure 9-36. TD_Init Example, OUT Endpoint Initialization9.3.7 CPU Access to IN Packets, AUTOIN = 1Auto-In mode is si

EZ-USB FX2 Technical Reference ManualPage 9-28 EZ-USB FX2 Technical Reference Manual v2.1Figure 9-38. Master Writes Directly to Host, AUTOIN = 1Figure

Chapter 9. Slave FIFOs Page 9-29Figure 9-40. TD_Poll Example: Sourcing an IN PacketTD_Poll(): … … … … …if( source_pkt_event ){ // 100-msec background

EZ-USB FX2 Technical Reference ManualPage 9-30 EZ-USB FX2 Technical Reference Manual v2.19.3.8 Access to IN Packets, AUTOIN=0In some systems, it may

Chapter 9. Slave FIFOs Page 9-31Figure 9-43. TD_Poll Example, AUTOIN=0, Editing a Packet via EPxBCH:L9.3.9 Auto-In / Auto-Out Initialization Enabling

EZ-USB FX2 Technical Reference ManualPage 9-32 EZ-USB FX2 Technical Reference Manual v2.19.3.10 Auto-Mode Example: Synchronous FIFO IN Data Transfers

Chapter 9. Slave FIFOs Page 9-339.3.11 Auto-Mode Example: Asynchronous FIFO IN Data TransfersThe initialization code is exactly the same as for the s

List of Figures xix(List of Figures) Figure 15-66. Data Toggle Control ...

EZ-USB FX2 Technical Reference ManualPage 9-34 EZ-USB FX2 Technical Reference Manual v2.1

Chapter 10. General Programmable Interface (GPIF) Page 10-1Chapter 10 General Programmable Interface (GPIF)10.1 IntroductionThe General Programmable

EZ-USB FX2 Technical Reference ManualPage 10-2 EZ-USB FX2 Technical Reference Manual v2.1chapter will describe the structure of the Waveform Descripto

Chapter 10. General Programmable Interface (GPIF) Page 10-3Figure 10-2. Example GPIF Waveform10.1.1 Typical GPIF InterfaceThe GPIF allows the EZ-USB

EZ-USB FX2 Technical Reference ManualPage 10-4 EZ-USB FX2 Technical Reference Manual v2.1Figure 10-3. EZ-USB FX2 Interfacing to a PeripheralThe follow

Chapter 10. General Programmable Interface (GPIF) Page 10-510.2 HardwareTable 10-1 lists the registers associated with the GPIF hardware; a detailed

EZ-USB FX2 Technical Reference ManualPage 10-6 EZ-USB FX2 Technical Reference Manual v2.1The Ready Input pins (RDY[5:0]) are sampled by the GPIF and c

Chapter 10. General Programmable Interface (GPIF) Page 10-710.2.3 Six Control OUT SignalsThe 100- and 128-pin FX2 packages bring out all six Control

EZ-USB FX2 Technical Reference ManualPage 10-8 EZ-USB FX2 Technical Reference Manual v2.110.2.6 Three GSTATE OUT signalsThree GPIF State lines, GSTAT

Chapter 10. General Programmable Interface (GPIF) Page 10-9When IFCLK is configured as an input, the minimum external frequency that can be applied to

Cypress Disclaimer AgreementThe information in this document is subject to change without notice and should not be con-strued as a commitment by Cypre

xx List of Figures(List of Figures) Figure 15-106. GPIF Data High (16-Bit Mode) ...

EZ-USB FX2 Technical Reference ManualPage 10-10 EZ-USB FX2 Technical Reference Manual v2.110.2.10 Connecting GPIF Signal Pins to HardwareThe first st

Chapter 10. General Programmable Interface (GPIF) Page 10-1110.3 Programming the GPIF WaveformsEach GPIF Waveform Descriptor can define up to 7 Stat

EZ-USB FX2 Technical Reference ManualPage 10-12 EZ-USB FX2 Technical Reference Manual v2.110.3.1 The GPIF RegistersTwo blocks of registers control th

Chapter 10. General Programmable Interface (GPIF) Page 10-13To complete a GPIF transaction, the GPIF program must branch to the IDLE State, regardless

EZ-USB FX2 Technical Reference ManualPage 10-14 EZ-USB FX2 Technical Reference Manual v2.1• If TRICTL is 1, GPIFIDLECTL[7:4] are the output enables fo

Chapter 10. General Programmable Interface (GPIF) Page 10-15Figure 10-7. Non-Decision Point (NDP) StatesReferring to Figure 10-7: In State 0:• FD[7:0]

EZ-USB FX2 Technical Reference ManualPage 10-16 EZ-USB FX2 Technical Reference Manual v2.1Since all States in this example are coded as NDPs, the GPIF

Chapter 10. General Programmable Interface (GPIF) Page 10-17Figure 10-8. One Decision Point: Wait States Inserted Until RDY0 Goes LowFigure 10-9. One

EZ-USB FX2 Technical Reference ManualPage 10-18 EZ-USB FX2 Technical Reference Manual v2.1In Figure 10-8, the GPIF remains in S1 until the RDY0 signal

Chapter 10. General Programmable Interface (GPIF) Page 10-19Figure 10-10. Re-Executing a Task within a DP StateFigure 10-11. GPIFTool Setup for the Wa

xxiiiList of TablesTable 1-1. USB PIDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

EZ-USB FX2 Technical Reference ManualPage 10-20 EZ-USB FX2 Technical Reference Manual v2.1Figure 10-12. A DP State Which Does NOT Re-Execute the TaskF

Chapter 10. General Programmable Interface (GPIF) Page 10-2110.3.4 State Instructions Each State’s characteristics are defined by a 4-byte State Inst

EZ-USB FX2 Technical Reference ManualPage 10-22 EZ-USB FX2 Technical Reference Manual v2.1 Decision Point State Instruction (DP = 1)LENGTH / BRANCH Re

Chapter 10. General Programmable Interface (GPIF) Page 10-23OPCODE Register: This register sets a number of State characteristics.SGL Bit: has no effe

EZ-USB FX2 Technical Reference ManualPage 10-24 EZ-USB FX2 Technical Reference Manual v2.1LOGIC FUNCTION Register: This register is used only in DP St

Chapter 10. General Programmable Interface (GPIF) Page 10-2510.3.4.1 Structure of the Waveform DescriptorsUp to four different Waveforms can be defin

EZ-USB FX2 Technical Reference ManualPage 10-26 EZ-USB FX2 Technical Reference Manual v2.110.4 FirmwareThe “x” in these register names represents 2,

Chapter 10. General Programmable Interface (GPIF) Page 10-27TD_Init(): … … … … …GpifInit(); // Configures GPIF from GPIFTool generated waveform data/

EZ-USB FX2 Technical Reference ManualPage 10-28 EZ-USB FX2 Technical Reference Manual v2.1 GPIFWFSELECT = InitData[ 5 ]; GPIFREADYSTAT = InitData[ 6

Chapter 10. General Programmable Interface (GPIF) Page 10-29// Set EP2GPIF Transaction Countvoid Peripheral_SetEP2GPIFTC( WORD xfrcnt ){ SYNCDELAY;

xxiv List of Tables(List of Tables)Table 4-2. IE Register — SFR 0xA8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

EZ-USB FX2 Technical Reference ManualPage 10-30 EZ-USB FX2 Technical Reference Manual v2.1// Set EP8GPIF Decision Point FIFO Flag Select (PF, EF, FF)v

Chapter 10. General Programmable Interface (GPIF) Page 10-31{ static BYTE g_data = 0x00; while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done

EZ-USB FX2 Technical Reference ManualPage 10-32 EZ-USB FX2 Technical Reference Manual v2.1 ; } // trigger FIFO write transaction(s), using SFR

Chapter 10. General Programmable Interface (GPIF) Page 10-3310.4.1 Single-Read Transactions * All EPx WORDWIDE bits must be cleared to 0 for 8-bit si

EZ-USB FX2 Technical Reference ManualPage 10-34 EZ-USB FX2 Technical Reference Manual v2.1Figure 10-15. Single-Read Transaction WaveformFigure 10-16.

Chapter 10. General Programmable Interface (GPIF) Page 10-35To perform a Single-Read transaction:1. Initialize the GPIF Configuration Registers and Wa

EZ-USB FX2 Technical Reference ManualPage 10-36 EZ-USB FX2 Technical Reference Manual v2.1Figure 10-17. Single-Read Transaction Functions#define PERIP

Chapter 10. General Programmable Interface (GPIF) Page 10-37Figure 10-18. Initialization Code for Single-Read Transactionsvoid TD_Init( void ){ BYTE

EZ-USB FX2 Technical Reference ManualPage 10-38 EZ-USB FX2 Technical Reference Manual v2.110.4.2 Single-Write Transactions * All EPx WORDWIDE bits mu

Chapter 10. General Programmable Interface (GPIF) Page 10-39Figure 10-20. Single-Write Transaction WaveformFigure 10-21. GPIFTool Setup for the Wavefo

List of Tables xxv(List of Tables)Table 11-5. FX2 Special Function Registers (SFR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

EZ-USB FX2 Technical Reference ManualPage 10-40 EZ-USB FX2 Technical Reference Manual v2.1ter to start a Single-Write transaction.In 8-bit mode, simpl

Chapter 10. General Programmable Interface (GPIF) Page 10-41Figure 10-23. Initialization Code for Single-Write Transactions10.4.3 FIFO-Read and FIFO-

EZ-USB FX2 Technical Reference ManualPage 10-42 EZ-USB FX2 Technical Reference Manual v2.1Each time through the Idle State, the GPIF will decrement th

Chapter 10. General Programmable Interface (GPIF) Page 10-43The GPIF Flag is tested only while transitioning through the Idle State, and it isn’t latc

EZ-USB FX2 Technical Reference ManualPage 10-44 EZ-USB FX2 Technical Reference Manual v2.1Figure 10-25. Example FIFO-Read TransactionFigure 10-26. FIF

Chapter 10. General Programmable Interface (GPIF) Page 10-45Figure 10-27. GPIFTool Setup for the Waveform of Figur e10-26Typically, when performing a

EZ-USB FX2 Technical Reference ManualPage 10-46 EZ-USB FX2 Technical Reference Manual v2.1Figure 10-28. FIFO-Read Transaction Functions#define GPIFTRI

Chapter 10. General Programmable Interface (GPIF) Page 10-47Figure 10-29. Initialization Code for FIFO-Read TransactionsFigure 10-30. FIFO-Read w/ AUT

EZ-USB FX2 Technical Reference ManualPage 10-48 EZ-USB FX2 Technical Reference Manual v2.1Figure 10-31. FIFO-Read w/ AUTOIN = 0, Committing Packets vi

Chapter 10. General Programmable Interface (GPIF) Page 10-49Figure 10-33. FIFO-Read Transaction Code, AUTOIN = 1Figure 10-34. Firmware intervention, A

xxvi List of Tables(List of Tables)Table 15-8. IFCFG Selection of Port I/O Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

EZ-USB FX2 Technical Reference ManualPage 10-50 EZ-USB FX2 Technical Reference Manual v2.1Figure 10-35. Committing a Packet by Writing INPKTEND with E

Chapter 10. General Programmable Interface (GPIF) Page 10-51Figure 10-37. Sourcing an IN Packet by writing to EPxBCH:LTD_Poll(): … … … … …if( source_p

EZ-USB FX2 Technical Reference ManualPage 10-52 EZ-USB FX2 Technical Reference Manual v2.110.4.7.1 Performing a FIFO-Write Transaction Figure 10-38.

Chapter 10. General Programmable Interface (GPIF) Page 10-53Figure 10-40. FIFO-Write Transaction WaveformThe above waveform executes until the Transac

EZ-USB FX2 Technical Reference ManualPage 10-54 EZ-USB FX2 Technical Reference Manual v2.1Typically, when performing a FIFO-Write, only one “NextData”

Chapter 10. General Programmable Interface (GPIF) Page 10-55Figure 10-43. Initialization Code for FIFO-Write TransactionsFigure 10-44. FIFO-Write w/ A

EZ-USB FX2 Technical Reference ManualPage 10-56 EZ-USB FX2 Technical Reference Manual v2.110.4.8 Firmware access to OUT packets, (AUTOOUT=1)To achiev

Chapter 10. General Programmable Interface (GPIF) Page 10-5710.4.9 Firmware access to OUT packets, (AUTOOUT = 0)Figure 10-48. Firmware can Skip or Co

EZ-USB FX2 Technical Reference ManualPage 10-58 EZ-USB FX2 Technical Reference Manual v2.12. It can skip packet(s) sent from the host to the master by

Chapter 10. General Programmable Interface (GPIF) Page 10-59The master is not notified when a packet has been skipped by the firmware.The OUT FIFO is

List of Tables xxvii(List of Tables)Table A-24 Endpoint Descriptor (EP6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

EZ-USB FX2 Technical Reference ManualPage 10-60 EZ-USB FX2 Technical Reference Manual v2.1Figure 10-54. Burst FIFO-Read Transaction Functions#define G

Chapter 10. General Programmable Interface (GPIF) Page 10-61Figure 10-55. Initialization for Burst FIFO-Read Transactionsvoid TD_Init( void ){ … … …

EZ-USB FX2 Technical Reference ManualPage 10-62 EZ-USB FX2 Technical Reference Manual v2.1Figure 10-56. Burst FIFO-Read Transaction Example, Writing I

Chapter 10. General Programmable Interface (GPIF) Page 10-63Figure 10-57. Burst FIFO-Read Transaction Example, Writing EPxBCL to Commit10.5 UDMA Int

EZ-USB FX2 Technical Reference ManualPage 10-64 EZ-USB FX2 Technical Reference Manual v2.1

Chapter 11. CPU Introduction Page 11-1Chapter 11 CPU Introduction11.1 IntroductionThe FX2’s CPU, an enhanced 8051, is fully described in Chapter 12, &

EZ-USB FX2 Technical Reference ManualPage 11-2 EZ-USB FX2 Technical Reference Manual v2.111.2 8051 EnhancementsThe FX2 uses the standard 8051 instruct

Chapter 11. CPU Introduction Page 11-311.3 Performance OverviewThe FX2 has been designed to offer increased performance by executing instructions in a

EZ-USB FX2 Technical Reference ManualPage 11-4 EZ-USB FX2 Technical Reference Manual v2.1Figure 11-2. FX2 to Standard 8051 Timing Comparison11.4 Softw

Chapter 11. CPU Introduction Page 11-511.6 FX2/DS80C320 DifferencesAlthough the FX2 is similar to the DS80C320 in terms of hardware features and instr

xxviii List of Tables

EZ-USB FX2 Technical Reference ManualPage 11-6 EZ-USB FX2 Technical Reference Manual v2.111.6.3 Timed Access ProtectionThe FX2 does not implement time

Chapter 11. CPU Introduction Page 11-711.7 EZ-USB FX2 Register InterfaceThe FX2 peripheral logic (USB, GPIF, FIFOs, etc.) is controlled via a set of m

EZ-USB FX2 Technical Reference ManualPage 11-8 EZ-USB FX2 Technical Reference Manual v2.1All other on-chip FX2 RAM (program/data memory, endpoint buff

Chapter 11. CPU Introduction Page 11-911.10InterruptsAll standard 8051 interrupts, plus additional interrupts, are supported by the FX2. Tabl e11-4 li

EZ-USB FX2 Technical Reference ManualPage 11-10 EZ-USB FX2 Technical Reference Manual v2.111.12Special Function Registers (SFR)The FX2 was designed to

Chapter 11. CPU Introduction Page 11-1111.13 External Address/Data BusesThe 128-pin version of the FX2 provides external, non-multiplexed 16-bit addr

EZ-USB FX2 Technical Reference ManualPage 11-12 EZ-USB FX2 Technical Reference Manual v2.1

Chapter 12. Instruction Set Page 12-1Chapter 12 Instruction Set12.1 IntroductionThis chapter provides a technical overview and description of the FX

EZ-USB FX2 Technical Reference ManualPage 12-2 EZ-USB FX2 Technical Reference Manual v2.1Table 12-2. FX2 Instruction SetMnemonic Description Bytes Cyc

Chapter 12. Instruction Set Page 12-3ORL direct, A OR A to direct byte 2 2 42ORL direct, #data OR immediate data to direct byte 3 3 43XRL A, Rn Exclus

Chapter 1. Introducing EZ-USB FX2 Page 1-1Chapter 1 Introducing EZ-USB FX21.1 IntroductionThe Universal Serial Bus (USB) has gained wide acceptance as

EZ-USB FX2 Technical Reference ManualPage 12-4 EZ-USB FX2 Technical Reference Manual v2.1MOVX @Ri, A Move A to external data at address Ri 1 2-9* F2-F

Chapter 12. Instruction Set Page 12-512.1.1 Instruction TimingInstruction cycles in the FX2 are 4 clock cycles in length, as opposed to the 12 clock

EZ-USB FX2 Technical Reference ManualPage 12-6 EZ-USB FX2 Technical Reference Manual v2.1The three LSBs of the Clock Control Register (CKCON, at SFR l

Chapter 12. Instruction Set Page 12-712.1.3 Dual Data PointersThe FX2 employs dual data pointers to accelerate data memory block moves. The standard

EZ-USB FX2 Technical Reference ManualPage 12-8 EZ-USB FX2 Technical Reference Manual v2.1Table 12-4. PSW Register - SFR 0xD0Bit FunctionPSW.7 CY - Car

Chapter 13. Input/Output Page 13-1Chapter 13 Input/Output13.1 IntroductionThe 56-pin FX2 package provides two input-output systems:• A set of program

EZ-USB FX2 Technical Reference ManualPage 13-2 EZ-USB FX2 Technical Reference Manual v2.1Each port is associated with a pair of registers:• An OEx reg

Chapter 13. Input/Output Page 13-3Figure 13-2. I/O Port Output-Enable RegistersOEA Port A Output Enable SFR 0xB2b7 b6 b5 b4 b3 b2 b1 b0D7 D6 D5 D4 D

EZ-USB FX2 Technical Reference ManualPage 13-4 EZ-USB FX2 Technical Reference Manual v2.1Figure 13-3. I/O Port Data RegistersIOA Port A (Bit-Addressab

Chapter 13. Input/Output Page 13-513.3 I/O Port Alternate FunctionsEach I/O pin may be configured for an alternate (i.e., non-general-purpose I/O) fun

EZ-USB FX2 Technical Reference ManualPage 1-2 EZ-USB FX2 Technical Reference Manual v2.1matically loads the device’s driver into the operating system.

EZ-USB FX2 Technical Reference ManualPage 13-6 EZ-USB FX2 Technical Reference Manual v2.1Figure 13-5. I/O-Pin Logic when Alternate Function is an INPU

Chapter 13. Input/Output Page 13-713.3.1 Port A Alternate FunctionsAlternate functions for the Port A pins are selected by bits in three registers, a

EZ-USB FX2 Technical Reference ManualPage 13-8 EZ-USB FX2 Technical Reference Manual v2.113.3.2 Port B and Port D Alternate FunctionsWhen IFCFG1 = 1,

Chapter 13. Input/Output Page 13-913.3.3 Port C Alternate FunctionsEach Port C pin may be individually configured for an alternate function by settin

EZ-USB FX2 Technical Reference ManualPage 13-10 EZ-USB FX2 Technical Reference Manual v2.113.3.4 Port E Alternate FunctionsEach Port E pin may be ind

Chapter 13. Input/Output Page 13-11Table 13-10. IFCFG Selection of Port I/O Pin FunctionsIFCFG1:0 = 00(Ports)IFCFG1:0 = 10(GPIF Master)IFCFG1:0 = 11(S

EZ-USB FX2 Technical Reference ManualPage 13-12 EZ-USB FX2 Technical Reference Manual v2.113.4 I²C-Compatible Bus ControllerThe I²C-compatible bus co

Chapter 13. Input/Output Page 13-13Figure 13-7. Addressing an I²C PeripheralEach peripheral (slave) device on the I²C bus has a unique address. The fi

EZ-USB FX2 Technical Reference ManualPage 13-14 EZ-USB FX2 Technical Reference Manual v2.1Figure 13-8. I²C-Compatible Registers13.4.2.1 Control Bits

Chapter 13. Input/Output Page 13-15While the I²C-Compatible Bus controller is generating the “stop” condition, it ignores accesses to the I2CS and I2D

Chapter 1. Introducing EZ-USB FX2 Page 1-31.4 Host Is MasterThis is a fundamental USB concept. There is exactly one master in a USB system: the host c

EZ-USB FX2 Technical Reference ManualPage 13-16 EZ-USB FX2 Technical Reference Manual v2.1dition is detected on the bus. BERR is automatically cleared

Chapter 13. Input/Output Page 13-1711. Set STOP=1.12. Read the last byte from I2DAT immediately (the next instruction) after setting the STOP bit. Thi

EZ-USB FX2 Technical Reference ManualPage 13-18 EZ-USB FX2 Technical Reference Manual v2.1After determining whether a one- or two-byte-address EEPROM

Chapter 14. Timers/Counters and Serial Interface Page 14-1Chapter 14 Timers/Counters and Serial Interface14.1 IntroductionThe FX2’s timer/counters an

EZ-USB FX2 Technical Reference ManualPage 14-2 EZ-USB FX2 Technical Reference Manual v2.114.2.1 803x/805x CompatibilityThe implementation of the time

Chapter 14. Timers/Counters and Serial Interface Page 14-314.2.2.1 Mode 0, 13-Bit Timer/Counter — Timer 0 and Timer 1Mode 0 operation is illustrated

EZ-USB FX2 Technical Reference ManualPage 14-4 EZ-USB FX2 Technical Reference Manual v2.1Table 14-2. TMOD Register — SFR 0x89Bit FunctionTMOD.7 GATE1

Chapter 14. Timers/Counters and Serial Interface Page 14-514.2.2.3 Mode 2, 8-Bit Counter with Auto-Reload — Timer 0 and Timer 1In mode 2, the timer i

EZ-USB FX2 Technical Reference ManualPage 14-6 EZ-USB FX2 Technical Reference Manual v2.1Figure 14-2. Timer 0/1 - Mode 214.2.2.4 Mode 3, Two 8-Bit Co

Chapter 14. Timers/Counters and Serial Interface Page 14-7Figure 14-3. Timer 0 - Mode 314.2.3 Timer Rate ControlBy default, the FX2 timers increment

iTable of ContentsChapter 1. Introducing EZ-USB FX2 1.1 Introduction...

EZ-USB FX2 Technical Reference ManualPage 1-4 EZ-USB FX2 Technical Reference Manual v2.1 Figure 1-1. USB PacketsFigure 1-1 illustrates a USB OUT trans

EZ-USB FX2 Technical Reference ManualPage 14-8 EZ-USB FX2 Technical Reference Manual v2.114.2.4 Timer 2Timer 2 runs only in 16-bit mode and offers se

Chapter 14. Timers/Counters and Serial Interface Page 14-914.2.4.1 Timer 2 Mode ControlTable 14-6 summarizes how the T2CON bits determine the Timer 2

EZ-USB FX2 Technical Reference ManualPage 14-10 EZ-USB FX2 Technical Reference Manual v2.114.2.5 Timer 2 — 16-Bit Timer/Counter ModeFigure 14-4 illus

Chapter 14. Timers/Counters and Serial Interface Page 14-11Figure 14-5. Timer 2 - Timer/Counter with Auto Reload14.2.7 Timer 2 — Baud Rate Generator

EZ-USB FX2 Technical Reference ManualPage 14-12 EZ-USB FX2 Technical Reference Manual v2.1Figure 14-6. Timer 2 - Baud Rate Generator Mode14.3 Serial

Chapter 14. Timers/Counters and Serial Interface Page 14-13The registers associated with the serial ports are as follows. (Registers PCON and EICON al

EZ-USB FX2 Technical Reference ManualPage 14-14 EZ-USB FX2 Technical Reference Manual v2.114.3.2 High-Speed Baud Rate GeneratorThe FX2 incorporates a

Chapter 14. Timers/Counters and Serial Interface Page 14-1514.3.3 Mode 0Serial mode 0 provides synchronous, half-duplex serial communication. For Ser

EZ-USB FX2 Technical Reference ManualPage 14-16 EZ-USB FX2 Technical Reference Manual v2.1Table 14-11. SCON0 Register — SFR 98hBit FunctionSCON0.7 SM0

Chapter 14. Timers/Counters and Serial Interface Page 14-17Table 14-14. SCON1 Register — SFR C0hBit FunctionSCON1.7 SM0_1 - Serial Port 1 mode bit 0.S

Chapter 1. Introducing EZ-USB FX2 Page 1-5• STALL means that something unforeseen went wrong (probably as a result of miscommu-nication or lack of coo

EZ-USB FX2 Technical Reference ManualPage 14-18 EZ-USB FX2 Technical Reference Manual v2.1Figure 14-7. Serial Port Mode 0 Receive Timing - Low Speed O

Chapter 14. Timers/Counters and Serial Interface Page 14-19Figure 14-9. Serial Port Mode 0 Transmit Timing - Low Speed OperationFigure 14-10. Serial P

EZ-USB FX2 Technical Reference ManualPage 14-20 EZ-USB FX2 Technical Reference Manual v2.114.3.4 Mode 1Mode 1 provides standard asynchronous, full-du

Chapter 14. Timers/Counters and Serial Interface Page 14-21To derive the required TH1 value from a known baud rate when T1M=1, use the equation:Very l

EZ-USB FX2 Technical Reference ManualPage 14-22 EZ-USB FX2 Technical Reference Manual v2.1To derive the required RCAP2H and RCAP2L values from a known

Chapter 14. Timers/Counters and Serial Interface Page 14-23of a start bit is detected, the divide-by-16 counter used to generate the receive clock is

EZ-USB FX2 Technical Reference ManualPage 14-24 EZ-USB FX2 Technical Reference Manual v2.1Figure 14-12. Serial Port 0 Mode 1 Receive Timing14.3.6 Mod

Chapter 14. Timers/Counters and Serial Interface Page 14-2514.3.6.2 Mode 2 ReceiveFigure 14-14 illustrates the mode 2 receive timing. Reception begin

EZ-USB FX2 Technical Reference ManualPage 14-26 EZ-USB FX2 Technical Reference Manual v2.1Figure 14-14. Serial Port 0 Mode 2 Receive Timing14.3.7 Mod

Chapter 14. Timers/Counters and Serial Interface Page 14-27Figure 14-15. Serial Port 0 Mode 3 Transmit TimingFigure 14-16. Serial Port 0 Mode 3 Receiv

EZ-USB FX2 Technical Reference ManualPage 1-6 EZ-USB FX2 Technical Reference Manual v2.11.8 USB Transfer TypesUSB defines four transfer types. These m

EZ-USB FX2 Technical Reference ManualPage 14-28 EZ-USB FX2 Technical Reference Manual v2.1

Chapter 15. Registers Page 15-1Chapter 15 Registers15.1 IntroductionThis section describes the EZ-USB FX2 registers in the order they appear in the

EZ-USB FX2 Technical Reference ManualPage 15-2 EZ-USB FX2 Technical Reference Manual v2.115.1.2 Other ConventionsUSB Indicates a global (not endpoint

Chapter 15. Registers Page 15-315.2 Special Function Registers (SFR)FX2 implements many control registers as SFRs (Special Function Registers). These

EZ-USB FX2 Technical Reference ManualPage 15-4 EZ-USB FX2 Technical Reference Manual v2.115.3 About SFRSBecause the SFRs are directly-addressable int

Chapter 15. Registers Page 15-5IOB Port B (bit addressable) SFR 0x90b7 b6 b5 b4 b3 b2 b1 b0D7 D6 D5 D4 D3 D2 D1 D0R/W R/W R/W R/W R/W R/W R/W R/Wx x

EZ-USB FX2 Technical Reference ManualPage 15-6 EZ-USB FX2 Technical Reference Manual v2.1Writing any value to INT2CLR or INT4CLR clears the INT2 or IN

Chapter 15. Registers Page 15-7The firmware can do this either by accessing the EP2FIFOIRQ register (at 0xE651) and writing a 1 to bit 1, or simply by

EZ-USB FX2 Technical Reference ManualPage 15-8 EZ-USB FX2 Technical Reference Manual v2.1FX2 provides two identical autopointers. They are similar to

Chapter 15. Registers Page 15-9FX2 I/O ports PORTA-PORTD appear as bit-addressable SFRS. Reading a register or bit returns the logic level of the port

Chapter 1. Introducing EZ-USB FX2 Page 1-71.8.3 Isochronous TransfersFigure 1-4. An Isochronous TransferIsochronous data is time-critical and used to

EZ-USB FX2 Technical Reference ManualPage 15-10 EZ-USB FX2 Technical Reference Manual v2.1OEA Port A Output Enable SFR 0xB2b7 b6 b5 b4 b3 b2 b1 b0D7

Chapter 15. Registers Page 15-11The bits in 0EA - 0EE turn on the output buffers for the five IO Ports PORTA-PORTE. Setting a bit to 1 turns on the ou

EZ-USB FX2 Technical Reference ManualPage 15-12 EZ-USB FX2 Technical Reference Manual v2.1Most of these SFR registers are also accessible in external

Chapter 15. Registers Page 15-1315.4 GPIF Waveform Memories15.4.1 GPIF Waveform Descriptor Data*Accessible only when IFCFG1:0 = 10.Figure 15-6. GPI

EZ-USB FX2 Technical Reference ManualPage 15-14 EZ-USB FX2 Technical Reference Manual v2.1The RD and WR strobes are asserted for two CLKOUT cycles; th

Chapter 15. Registers Page 15-15Bit 7 IFCLKSRC FIFO/GPIF Clock SourceThis bit selects the clock source for both the FIFOS and GPIF. If IFCLKSRC=0, the

EZ-USB FX2 Technical Reference ManualPage 15-16 EZ-USB FX2 Technical Reference Manual v2.1Bit 3 ASYNC FIFO/GPIF Asynchronous ModeWhen ASYNC=0, the FIF

Chapter 15. Registers Page 15-17Table 15-8. IFCFG Selection of Port I/O Pin FunctionsIFCFG1:0 = 00(Ports)IFCFG1:0 = 10(GPIF Master)IFCFG1:0 = 11(Slave

EZ-USB FX2 Technical Reference ManualPage 15-18 EZ-USB FX2 Technical Reference Manual v2.115.5.3 Slave FIFO FLAGA-FLAGD Pin ConfigurationFigure 15-10

Chapter 15. Registers Page 15-19NOTE: FLAGD defaults to EP2PF (fixed flag).For the default (0000) selection, the four FIFO flags are indexed as shown

EZ-USB FX2 Technical Reference ManualPage 1-8 EZ-USB FX2 Technical Reference Manual v2.1Control transfers configure and send commands to a device. Bec

EZ-USB FX2 Technical Reference ManualPage 15-20 EZ-USB FX2 Technical Reference Manual v2.115.5.4 FIFO ResetFigure 15-11. Restore FIFOs to Reset State

Chapter 15. Registers Page 15-21Bit 2 BPPULSE Breakpoint Pulse ModeSet this bit to “1” to pulse the BREAK bit (and BKPT pin) high for 8 CLKOUT cycles

EZ-USB FX2 Technical Reference ManualPage 15-22 EZ-USB FX2 Technical Reference Manual v2.115.5.6 230 Kbaud Clock (T0, T1, T2)Figure 15-15. 230 Kbaud

Chapter 15. Registers Page 15-23Bit 3 SLRD FIFO Read PolarityThis bit selects the polarity of the SLRD FIFO input pin. 0 selects the polarity shown in

EZ-USB FX2 Technical Reference ManualPage 15-24 EZ-USB FX2 Technical Reference Manual v2.115.5.9 Chip Revision ControlFigure 15-18. Chip Revision Con

Chapter 15. Registers Page 15-2515.5.10 GPIF Hold TimeFor any transaction where the GPIF writes data onto FD[15:0], this register determines how long

EZ-USB FX2 Technical Reference ManualPage 15-26 EZ-USB FX2 Technical Reference Manual v2.115.6 Endpoint Configuration15.6.1 Endpoint 1-OUT/Endpoint

Chapter 15. Registers Page 15-2715.6.2 Endpoint 2, 4, 6 and 8 ConfigurationFigure 15-20. Endpoint 2 ConfigurationFigure 15-21. Endpoint 4 Configurati

EZ-USB FX2 Technical Reference ManualPage 15-28 EZ-USB FX2 Technical Reference Manual v2.1These registers configure the large, data-handling FX2 endpo

Chapter 15. Registers Page 15-2915.6.3 Endpoint 2, 4, 6 and 8/Slave FIFO ConfigurationFigure 15-24. Endpoint 2, 4, 6 and 8 /Slave FIFO ConfigurationB

Chapter 1. Introducing EZ-USB FX2 Page 1-91.10 The Serial Interface Engine (SIE)Figure 1-6. What the SIE DoesEvery USB device has a Serial Interface E

EZ-USB FX2 Technical Reference ManualPage 15-30 EZ-USB FX2 Technical Reference Manual v2.1When AUTOOUT=0, as soon as a buffer fills with USB data, an

Chapter 15. Registers Page 15-3115.6.4 Endpoint 2, 4, 6, 8 AUTOIN Packet Length (High/Low)Figure 15-25. Endpoint 2 and 6 AUTOIN Packet Length HighBit

EZ-USB FX2 Technical Reference ManualPage 15-32 EZ-USB FX2 Technical Reference Manual v2.1Figure 15-27. Endpoint 2, 4, 6, 8 AUTOIN Packet Length LowBi

Chapter 15. Registers Page 15-3315.6.5 Endpoint 2, 4, 6, 8 /Slave FIFO Programmable-Level Flag (High/Low)Figure 15-28. Endpoint 2/Slave FIFO Programm

EZ-USB FX2 Technical Reference ManualPage 15-34 EZ-USB FX2 Technical Reference Manual v2.1Figure 15-29. Endpoint 6/Slave FIFO Programmable Flag High T

Chapter 15. Registers Page 15-35By default, FLAGA is the Programmable-Level Flag (PF) for the endpoint currently pointed to by the FIFOADR[1:0] pins.

EZ-USB FX2 Technical Reference ManualPage 15-36 EZ-USB FX2 Technical Reference Manual v2.1Figure 15-30. Endpoint 4/Slave FIFO Programmable Flag HighEP

Chapter 15. Registers Page 15-37.Figure 15-31. Endpoint 8/Slave FIFO Programmable Flag HighRefer to the discussion for EP2PF.Bit 7 DECIS PF PolaritySe

EZ-USB FX2 Technical Reference ManualPage 15-38 EZ-USB FX2 Technical Reference Manual v2.1Figure 15-32. Endpoint 2, 4, 6, 8/Slave FIFO Programmable Fl

Chapter 15. Registers Page 15-3915.6.5.1 IN EndpointsFor IN endpoints, the Trigger registers can apply to either the full FIFO, comprising multiple p

EZ-USB FX2 Technical Reference ManualPage 1-10 EZ-USB FX2 Technical Reference Manual v2.1RAM which can be loaded over the USB. This makes modification

EZ-USB FX2 Technical Reference ManualPage 15-40 EZ-USB FX2 Technical Reference Manual v2.1Example 2: If you want the PF to inform the outside interfac

Chapter 15. Registers Page 15-4115.6.6 Endpoint 2, 4, 6, 8 ISO IN Packets per FrameFigure 15-34. Endpoint ISO IN Packets per FrameBit 1-0 INPPF1:0 IN

EZ-USB FX2 Technical Reference ManualPage 15-42 EZ-USB FX2 Technical Reference Manual v2.1Bit 7 SKIP Skip PacketWhen ENH_PKT (REVCTL.0) is set to 1, s

Chapter 15. Registers Page 15-4315.7 Interrupts15.7.1 Endpoint 2, 4, 6, 8 Slave FIFO Flag Interrupt Enable/RequestFigure 15-37. Endpoint 2, 4, 6, 8

EZ-USB FX2 Technical Reference ManualPage 15-44 EZ-USB FX2 Technical Reference Manual v2.1Bit 1 EF Empty FlagWhen this bit is '1', the empty

Chapter 15. Registers Page 15-45Bit 0 FF Full FlagFX2 sets FF to 1 to indicate a “full flag” interrupt request. The interrupt source is available in t

EZ-USB FX2 Technical Reference ManualPage 15-46 EZ-USB FX2 Technical Reference Manual v2.1Do not clear an IRQ bit by reading an IRQ Register, ORing it

Chapter 15. Registers Page 15-47Bit 0 IBN IBN INT Enable/RequestThis bit is automatically set when any of the IN bulk endpoints responds to an IN toke

EZ-USB FX2 Technical Reference ManualPage 15-48 EZ-USB FX2 Technical Reference Manual v2.1Bit 5 HSGRANT Grant High Speed AccessThe FX2 SIE sets this b

Chapter 15. Registers Page 15-4915.7.5 Endpoint Interrupt Enable/RequestFigure 15-45. Endpoint Interrupt EnablesFigure 15-46. Endpoint Interrupt Requ

Chapter 1. Introducing EZ-USB FX2 Page 1-111.12 EZ-USB FX2 Architecture Figure 1-7. FX2 56-pin Package Simplified Block DiagramThe FX2 packs all the i

EZ-USB FX2 Technical Reference ManualPage 15-50 EZ-USB FX2 Technical Reference Manual v2.115.7.6 GPIF Interrupt Enable/RequestFigure 15-47. GPIF Inte

Chapter 15. Registers Page 15-5115.7.7 USB Error Interrupt Enable/RequestFigure 15-49. USB Error Interrupt EnablesFigure 15-50. USB Error Interrupt R

EZ-USB FX2 Technical Reference ManualPage 15-52 EZ-USB FX2 Technical Reference Manual v2.115.7.8 USB Error Counter LimitFigure 15-51. USB Error Count

Chapter 15. Registers Page 15-5315.7.10 INT 2 (USB) AutovectorFigure 15-53. INT 2 (USB) AutovectorBit 6-2 I2V4:0 INT 2 AutovectorTo save the code and

EZ-USB FX2 Technical Reference ManualPage 15-54 EZ-USB FX2 Technical Reference Manual v2.1I4V indicates the source of an interrupt from the USB Core.

Chapter 15. Registers Page 15-5515.8 Input/Output Registers15.8.1 I/O PORTA Alternate ConfigurationFigure 15-56. I/O PORTA Alternate ConfigurationN

EZ-USB FX2 Technical Reference ManualPage 15-56 EZ-USB FX2 Technical Reference Manual v2.115.8.2 I/O PORTC Alternate ConfigurationFigure 15-57. I/O P

Chapter 15. Registers Page 15-57Bit 5 INT6 INT6 Interrupt RequestSetting this bit to '1' configures this Port E pin as INT6.Bit 4 RXD1OUT Mo

EZ-USB FX2 Technical Reference ManualPage 15-58 EZ-USB FX2 Technical Reference Manual v2.1Bit 5 LASTRD Last Data ReadTo read data over the I²C compati

Chapter 15. Registers Page 15-5915.8.5 I²C-Compatible Bus DataFigure 15-60. I²C-Compatible Bus DataBit 7-0 Data Data BitsEight bits of data; triggers

EZ-USB FX2 Technical Reference ManualPage 1-12 EZ-USB FX2 Technical Reference Manual v2.1The FIFOs can be controlled by an external master, which eith

EZ-USB FX2 Technical Reference ManualPage 15-60 EZ-USB FX2 Technical Reference Manual v2.1Bit 0 400KHZ High-speed I²C Compatible BusFor I²C-compatible

Chapter 15. Registers Page 15-6115.9 UDMA CRC RegistersFor complete Flowstate / UDMA information, please contact the Cypress Semiconductor Applica-t

EZ-USB FX2 Technical Reference ManualPage 15-62 EZ-USB FX2 Technical Reference Manual v2.1This register only applies to UDMA IN transactions that are

Chapter 15. Registers Page 15-6315.10 USB Control15.10.1 USB Control and StatusFigure 15-63. USB Control and StatusBit 7 HSM High Speed ModeIf HSM=1

EZ-USB FX2 Technical Reference ManualPage 15-64 EZ-USB FX2 Technical Reference Manual v2.1Bit 0 SIGRSUME Signal Remote Device ResumeSet SIGRSUME=1 to

Chapter 15. Registers Page 15-65Bit 6 WU Wakeup Initiated from WU PinThe FX2 sets this bit to1 when wakeup was initiated by the WU pin. Write a 1 to t

EZ-USB FX2 Technical Reference ManualPage 15-66 EZ-USB FX2 Technical Reference Manual v2.1Bit 6 S Set Data Toggle to DATA1After selecting the desired

Chapter 15. Registers Page 15-6715.10.6 USB Frame Count LowFigure 15-68. USB Frame Count LowBit 7-0 FC7:0 Low Byte for USB Frame CountEvery milliseco

EZ-USB FX2 Technical Reference ManualPage 15-68 EZ-USB FX2 Technical Reference Manual v2.115.10.8 USB Function AddressFigure 15-70. USB Function Addr

Chapter 15. Registers Page 15-69The SIE normally determines how many bytes to send over EP0 in response to a device request by taking the smaller of (

Chapter 1. Introducing EZ-USB FX2 Page 1-131.13 FX2 Feature SummaryFX2 includes the following features:• On-chip 480 Mbits/sec transceiver, PLL and SI

EZ-USB FX2 Technical Reference ManualPage 15-70 EZ-USB FX2 Technical Reference Manual v2.115.11.4 Endpoint 2 and 6 Byte Count HighFigure 15-74. Endpo

Chapter 15. Registers Page 15-7115.11.6 Endpoint 2, 4, 6, 8 Byte Count LowFigure 15-76. Endpoint 2, 4, 6, 8 Byte Count LowBit 7-0 BC7:0 Byte CountLow

EZ-USB FX2 Technical Reference ManualPage 15-72 EZ-USB FX2 Technical Reference Manual v2.1off completing the CONTROL transfer until the device has had

Chapter 15. Registers Page 15-73EP1OUTBUF is available for the firmware to read. USB OUT tokens for the endpoint are NAK’d while BUSY=1 (the firmware

EZ-USB FX2 Technical Reference ManualPage 15-74 EZ-USB FX2 Technical Reference Manual v2.115.11.9 Endpoint 2 Control and StatusFigure 15-79. Endpoint

Chapter 15. Registers Page 15-75Bit 5-4 NPAK1:0 Number of Packets in FIFOThe number of packets in the FIFO. 0-2 Packets.Bit 3 FULL Endpoint FIFO FullT

EZ-USB FX2 Technical Reference ManualPage 15-76 EZ-USB FX2 Technical Reference Manual v2.115.11.12 Endpoint 8 Control and StatusFigure 15-82. Endpoin

Chapter 15. Registers Page 15-7715.11.13 Endpoint 2 and 4 Slave FIFO FlagsFigure 15-83. Endpoint 2 and 4 Slave FIFO FlagsBit 2 PF Programmable FlagSt

EZ-USB FX2 Technical Reference ManualPage 15-78 EZ-USB FX2 Technical Reference Manual v2.1Bit 2 PF Programmable FlagState of the EP6/EP8 Programmable

Chapter 15. Registers Page 15-79Bit 3-0 BC11:8 Byte Count HighTotal number of bytes in Endpoint FIFO. Maximum of 2048 bytes.15.11.17 Endpoint 4 and 8

iiTable of Contents(Table of Contents) 2.3.3 Clear Feature...

EZ-USB FX2 Technical Reference ManualPage 1-14 EZ-USB FX2 Technical Reference Manual v2.1the firmware associated with the USB protocol is simplified,

EZ-USB FX2 Technical Reference ManualPage 15-80 EZ-USB FX2 Technical Reference Manual v2.115.11.19 Setup Data Pointer High and Low AddressFigure 15-8

Chapter 15. Registers Page 15-8115.11.20 Setup Data Pointer AutoFigure 15-91. Setup Data Pointer AUTO ModeBit 0 SDPAUTO Setup Data Pointer Auto ModeT

EZ-USB FX2 Technical Reference ManualPage 15-82 EZ-USB FX2 Technical Reference Manual v2.115.11.21 Setup Data - 8 BytesFigure 15-92. Setup Data - 8 B

Chapter 15. Registers Page 15-8315.12 General Programmable Interface (GPIF)15.12.1 GPIF Waveform SelectorFigure 15-93. GPIF Waveform SelectorBit 7-6

EZ-USB FX2 Technical Reference ManualPage 15-84 EZ-USB FX2 Technical Reference Manual v2.1Bit 7 DONE GPIF Idle State0 = Transaction in progress.1 = Tr

Chapter 15. Registers Page 15-85The GPIF Control pins (CTL[5:0]) have several output modes:• CTL[3:0] can act as CMOS outputs (optionally tristatable)

EZ-USB FX2 Technical Reference ManualPage 15-86 EZ-USB FX2 Technical Reference Manual v2.1Table 15-17 illustrates this relationship.15.12.4 GPIF Addr

Chapter 15. Registers Page 15-8715.12.5 GPIF Address LowFigure 15-98. GPIF Address LowBit 7-0 GPIFA7:0 Lower 8 bits of GPIF AddressData written to th

EZ-USB FX2 Technical Reference ManualPage 15-88 EZ-USB FX2 Technical Reference Manual v2.1The bit definitions for this register are analogous to the b

Chapter 15. Registers Page 15-89Bits 5-3 TERMA[2:0] Flow State Logic-Function ArgumentsBits 2-0 TERMB[2:0]0 = RDY[0]1 = RDY[1]2 = RDY[2]3 = RDY[3]4 =

Chapter 1. Introducing EZ-USB FX2 Page 1-151.15 FX2 Block DiagramFigure 1-9. FX2 Block Diagram805148 MHz8 KBPgm/DataRAM4 KBEndpointRAMport DGPIFFIFOS1

EZ-USB FX2 Technical Reference ManualPage 15-90 EZ-USB FX2 Technical Reference Manual v2.1CTLx Bit: specifies the state to set each CTLx signal to dur

Chapter 15. Registers Page 15-91* - based on suggested FLOW_LOGIC settings.This register defines the Master Strobe that causes data to be read or writ

EZ-USB FX2 Technical Reference ManualPage 15-92 EZ-USB FX2 Technical Reference Manual v2.11: GPIF is the slave of the bus transaction. This means that

Chapter 15. Registers Page 15-934. the rate at which data is being written in exceeds 96 MB/s for a word-wide data bus or 48 MB/s for a byte-wide data

EZ-USB FX2 Technical Reference ManualPage 15-94 EZ-USB FX2 Technical Reference Manual v2.1If the flow state is such that the GPIF is the master on the

Chapter 15. Registers Page 15-95this case. It is with respect to when the data would normally come out in response to Master Strobe including any late

EZ-USB FX2 Technical Reference ManualPage 15-96 EZ-USB FX2 Technical Reference Manual v2.1Bit 7-0 TC16:23 GPIF Transaction CountRefer to Bit 0 of this

Chapter 15. Registers Page 15-9715.12.8 Endpoint 2, 4, 6, 8 GPIF Flag SelectFigure 15-103. Endpoint 2, 4, 6, 8 GPIF Flag SelectBit 1-0 FS1:0 GPIF Fla

EZ-USB FX2 Technical Reference ManualPage 15-98 EZ-USB FX2 Technical Reference Manual v2.115.12.9 Endpoint 2, 4, 6, and 8 GPIF Stop TransactionFigure

Chapter 15. Registers Page 15-9915.12.11 GPIF Data High (16-Bit Mode)Figure 15-106. GPIF Data High (16-Bit Mode)Bit 7-0 D15:8 GPIF Data HighContains

EZ-USB FX2 Technical Reference ManualPage 1-16 EZ-USB FX2 Technical Reference Manual v2.11.16 PackagesFX2 is available in three packages:Figure 1-10.

EZ-USB FX2 Technical Reference ManualPage 15-100 EZ-USB FX2 Technical Reference Manual v2.115.12.13 Read GPIF Data LOW, No Transaction TriggerFigure

Chapter 15. Registers Page 15-101If the RDY signals are synchronized to IFCLK, and obey the setup and hold times with respect to this clock, the user

EZ-USB FX2 Technical Reference ManualPage 15-102 EZ-USB FX2 Technical Reference Manual v2.115.13 Endpoint Buffers15.13.1 EP0 IN-OUT BufferFigure 15-

Chapter 15. Registers Page 15-10315.13.3 Endpoint 1-IN BufferFigure 15-114. EP1-IN BufferBit 7-0 D7:0 EP1-IN BufferEP1-IN Data buffer. 64 bytes.15.13

EZ-USB FX2 Technical Reference ManualPage 15-104 EZ-USB FX2 Technical Reference Manual v2.115.13.5 512-byte Endpoint 4/Slave FIFO BufferFigure 15-116

Chapter 15. Registers Page 15-10515.13.7 512-byte Endpoint 8/Slave FIFO BufferFigure 15-118. 512-byte EP8/Slave FIFO Buffer Bit 7-0 D7:0 EP8 Data512-

EZ-USB FX2 Technical Reference ManualPage 15-106 EZ-USB FX2 Technical Reference Manual v2.1The minimum delay length is a function of the IFCLK and CLK

Appendix A A - 1Appendix ADefault Descriptors for Full Speed ModeTables A-1 through A-25 show the descriptor data built into the FX2 logic. The tables

EZ-USB FX2 Technical Reference ManualA - 2 EZ-USB FX2 Technical Reference Manual v2.1The configuration descriptor includes a total length field (offse

Appendix A A - 3Table A-4 USB Default Interface 0, Alternate Setting 0 Offset Field Description Value0 bLength Length of the Interface Descriptor 09

Chapter 1. Introducing EZ-USB FX2 Page 1-171.16.2 100-Pin PackageThe 100-pin package adds functionality to the 56-pin package:• Two additional 8-bit

EZ-USB FX2 Technical Reference ManualA - 4 EZ-USB FX2 Technical Reference Manual v2.1Table A-7 Endpoint Descriptor (EP1 in)Offset Field Description

Appendix A A - 5Table A-10 Endpoint Descriptor (EP6)Offset Field Description Value0 bLength Length of this Endpoint Descriptor 07H1 bDescriptorType

EZ-USB FX2 Technical Reference ManualA - 6 EZ-USB FX2 Technical Reference Manual v2.1Table A-13 Endpoint Descriptor (EP1 out)Offset Field Descriptio

Appendix A A - 7Table A-16 Endpoint Descriptor (EP4)Offset Field Description Value0 bLength Length of this Endpoint Descriptor 07H1 bDescriptorType

EZ-USB FX2 Technical Reference ManualA - 8 EZ-USB FX2 Technical Reference Manual v2.1Table A-19 Interface Descriptor (Alt. Setting 3)Offset Field De

Appendix A A - 9Table A-22 Endpoint Descriptor (EP2)Offset Field Description Value0 bLength Length of this Endpoint Descriptor 07H1 bDescriptorType

EZ-USB FX2 Technical Reference ManualA - 10 EZ-USB FX2 Technical Reference Manual v2.1Table A-25 Endpoint Descriptor (EP8)Offset Field Description V

Appendix B B - 11Appendix B Default Descriptors for High Speed ModeTables B-1 through B-25 show the descriptor data built into the FX2 logic. The tabl

EZ-USB FX2 Technical Reference ManualB - 12 EZ-USB FX2 Technical Reference Manual v2.1Table B-2 Device QualifierOffset Field Description Value0 bLen

Appendix B B - 13Table B-4 Interface Descriptor (Alt. Setting 0)Offset Field Description Value0 bLength Length of the Interface Descriptor 09H1 bDes

EZ-USB FX2 Technical Reference ManualPage 1-18 EZ-USB FX2 Technical Reference Manual v2.1In the “Slave FIFO” mode, external logic or an external proce

EZ-USB FX2 Technical Reference ManualB - 14 EZ-USB FX2 Technical Reference Manual v2.1Table B-7 Endpoint Descriptor (EP1 in)Offset Field Description

Appendix B B - 15Table B-10 Endpoint Descriptor (EP6)Offset Field Description Value0 bLength Length of this Endpoint Descriptor 07H1 bDescriptorTyp

EZ-USB FX2 Technical Reference ManualB - 16 EZ-USB FX2 Technical Reference Manual v2.1Table B-13 Endpoint Descriptor (EP1 out)Offset Field Descripti

Appendix B B - 17Table B-16 Endpoint Descriptor (EP4)Offset Field Description Value0 bLength Length of this Endpoint Descriptor 07H1 bDescriptorTyp

EZ-USB FX2 Technical Reference ManualB - 18 EZ-USB FX2 Technical Reference Manual v2.1Table B-19 Interface Descriptor (Alt. Setting 3)Offset Field D

Appendix B B - 19Table B-22 Endpoint Descriptor (EP2)Offset Field Description Value0 bLength Length of this Endpoint Descriptor 07H1 bDescriptorTyp

EZ-USB FX2 Technical Reference ManualB - 20 EZ-USB FX2 Technical Reference Manual v2.1 Table B-25 Endpoint Descriptor (EP8)Offset Field Description

Appendix C C - 21Appendix CFX2 Register SummaryThe following table is a summary of all the EZ-USB FX2 Registers.In the “b7-b0” columns, bit positions

EZ-USB FX2 Technical Reference ManualC - 22 EZ-USB FX2 Technical Reference Manual v2.1

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 23 EZ-USB FX2 Registers & BuffersRegister SummaryHex Size Name Description b7 b6 b5 b4 b3

Chapter 1. Introducing EZ-USB FX2 Page 1-19Figure 1-11. Signals for the Three FX2 Package Types10012856DPLUSDMINUSSCLSDARESET#WAKEUPPD6PD7PD5PD4PD3PD2

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 24 EZ-USB FX2 Registers & BuffersE608 1 UART230 230 Kbaud internally generated ref. clock0

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 25 EZ-USB FX2 Registers & BuffersE620 1 EP2AUTOINLENHsee Section 15.14Endpoint 2 AUTOIN Pa

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 26 EZ-USB FX2 Registers & BuffersE640 1 EP2ISOINPKTS EP2 (if ISO) IN Packets per frame (1-

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 27 EZ-USB FX2 Registers & BuffersE660 1 GPIFIEsee Section 15.14GPIF Interrupt Enable 0 0 0

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 28 EZ-USB FX2 Registers & BuffersE682 1 WAKEUPCS Wakeup Control & Status WU2 WU WU2POL

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 29 EZ-USB FX2 Registers & BuffersE6A3 1 EP2CS Endpoint 2 Control and Status 0 NPAK2 NPAK1

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 30 EZ-USB FX2 Registers & BuffersSETUPDAT[4:5] = wIndex word-sized field that varies accor

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 31 EZ-USB FX2 Registers & BuffersE6DA 1 EP4GPIFFLGSELsee Section 15.14Endpoint 4 GPIF Flag

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 32 EZ-USB FX2 Registers & Buffers2048 reserved RWF000 1024 EP2FIFOBUF 512/1024-byte EP 2 /

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 33 EZ-USB FX2 Registers & Buffers92 1 MPAGE(1)Upper Addr Byte of MOVX using @R0 / @R1A15 A

EZ-USB FX2 Technical Reference ManualPage 1-20 EZ-USB FX2 Technical Reference Manual v2.11.17 Package DiagramsFigure 1-12. CY7C68013-128 TQFP Pin Assi

EZ-USB FX2 Technical Reference Manual v2.1 Appendix C - 34 EZ-USB FX2 Registers & BuffersB8 1 IP Interrupt Priority (bit address-able)1 PS1 PT2 PS

Chapter 1. Introducing EZ-USB FX2 Page 1-21Figure 1-13. CY7C68013-100 TQFP Pin AssignmentPD0/FD8*WAKEUPVCCRESETCTL5GNDPA7/*FLAGD/SLCSPA6/*PKTENDPA5/FI

EZ-USB FX2 Technical Reference ManualPage 1-22 EZ-USB FX2 Technical Reference Manual v2.1Figure 1-14. CY7C68013-56 SSOP Pin Assignment1234567891011121

Chapter 1. Introducing EZ-USB FX2 Page 1-231.18 FX2 Endpoint BuffersThe USB Specification defines an endpoint as a source or sink of data. Since USB i

Table of Contentsiii(Table of Contents)4.4.2.2 SOF Interrupt ...

EZ-USB FX2 Technical Reference ManualPage 1-24 EZ-USB FX2 Technical Reference Manual v2.1The eight SETUP bytes in a CONTROL transfer do not appear in

Chapter 1. Introducing EZ-USB FX2 Page 1-251.19 External FIFO InterfaceThe large data FIFOs (endpoints 2, 4, 6 and 8) in the FX2 are designed to move

EZ-USB FX2 Technical Reference ManualPage 1-26 EZ-USB FX2 Technical Reference Manual v2.1Figure 1-16. FX2 FIFOs in “Slave FIFO” ModeFigure 1-16 illust

Chapter 1. Introducing EZ-USB FX2 Page 1-27Figure 1-17. FX2 FIFOs in “GPIF Master” Mode External systems that connect to the FX2 FIFOs must provide co

EZ-USB FX2 Technical Reference ManualPage 1-28 EZ-USB FX2 Technical Reference Manual v2.1menting “wait states”. GPIFADR pins present a 9-bit address t

Chapter 2. Endpoint Zero Page 2-1Chapter 2 Endpoint Zero2.1 IntroductionEndpoint zero has special significance in a USB system. It is a CONTROL endpoi

EZ-USB FX2 Technical Reference ManualPage 2-2 EZ-USB FX2 Technical Reference Manual v2.12.2 Control Endpoint EP0Figure 2-1. A USB Control Transfer (Wi

Chapter 2. Endpoint Zero Page 2-3The STATUS stage consists of an empty data packet with the opposite direction of the data stage, or an IN if there wa

EZ-USB FX2 Technical Reference ManualPage 2-4 EZ-USB FX2 Technical Reference Manual v2.1must always be accepted and never NAK’d. It is possible, there

Chapter 2. Endpoint Zero Page 2-52.3 USB RequestsThe Universal Serial Bus Specification Version 2.0, Chapter 9, "USB Device Framework" defi

ivTable of Contents(Table of Contents) 7.3.2 EEPROM Load...

EZ-USB FX2 Technical Reference ManualPage 2-6 EZ-USB FX2 Technical Reference Manual v2.1.In the ReNumerated condition (RENUM=1), the FX2 passes all US

Chapter 2. Endpoint Zero Page 2-72.3.1 Get StatusThe USB Specification defines three USB status requests. A fourth request, to an interface, is declar

EZ-USB FX2 Technical Reference ManualPage 2-8 EZ-USB FX2 Technical Reference Manual v2.1As Figure 2-4 illustrates, the firmware responds to the SUDAV

Chapter 2. Endpoint Zero Page 2-9Endpoint zero is a CONTROL endpoint, which by USB definition is bi-directional. Therefore, it has only one stall bit.

EZ-USB FX2 Technical Reference ManualPage 2-10 EZ-USB FX2 Technical Reference Manual v2.12.3.2 Set Feature Set Feature is used to enable remote wakeu

Chapter 2. Endpoint Zero Page 2-113. Restore the stalled endpoint to its default condition, ready to send or accept data after the stall condition is

EZ-USB FX2 Technical Reference ManualPage 2-12 EZ-USB FX2 Technical Reference Manual v2.1If the USB device supports remote wakeup (reported in its des

Chapter 2. Endpoint Zero Page 2-13Figure 2-5. Using Setup Data Pointer (SUDPTR) for Get_Descriptor RequestsFigure 2-5 illustrates use of the Setup Dat

EZ-USB FX2 Technical Reference ManualPage 2-14 EZ-USB FX2 Technical Reference Manual v2.12.3.4.1 Get Descriptor-DeviceAs illustrated in Figure 2-5, t

Chapter 2. Endpoint Zero Page 2-15Data Pointer. However, this would waste bandwidth because it requires byte transfers into the EP0BUF Buffer; using t

Table of Contentsv(Table of Contents) 9.2.4 FIFO Flag Pins (FLAGA, FLAGB, FLAGC, FLAGD)...9-6

EZ-USB FX2 Technical Reference ManualPage 2-16 EZ-USB FX2 Technical Reference Manual v2.12.3.4.4 Get Descriptor-StringConfiguration and String descri

Chapter 2. Endpoint Zero Page 2-172.3.5 Set DescriptorTable 2-15. Set Descriptor-DeviceByte Field Value Meaning Firmware Response0 bmRequestType0x00

EZ-USB FX2 Technical Reference ManualPage 2-18 EZ-USB FX2 Technical Reference Manual v2.1The firmware handles Set Descriptor requests by clearing the

Chapter 2. Endpoint Zero Page 2-19Configurations, Interfaces, and Alternate SettingsA USB device has one or more configu-rations. Only one configurati

EZ-USB FX2 Technical Reference ManualPage 2-20 EZ-USB FX2 Technical Reference Manual v2.12.3.5.1 Set ConfigurationWhen the host issues the Set Config

Chapter 2. Endpoint Zero Page 2-212.3.7 Set InterfaceThis confusingly-named USB command actually sets alternate settings for a specified interface.US

EZ-USB FX2 Technical Reference ManualPage 2-22 EZ-USB FX2 Technical Reference Manual v2.12.3.8 Get InterfaceWhen the host issues the Get Interface re

Chapter 2. Endpoint Zero Page 2-232.3.10 Sync FrameThe Sync Frame request is used to establish a marker in time so the host and USB device can synchr

EZ-USB FX2 Technical Reference ManualPage 2-24 EZ-USB FX2 Technical Reference Manual v2.12.3.11 Firmware LoadThe USB endpoint-zero protocol provides

Chapter 3. Enumeration and ReNumeration™ Page 3-1Chapter 3 Enumeration and ReNumeration™3.1 IntroductionThe FX2’s configuration is soft: Code and data

viTable of Contents(Table of Contents)10.3.2.2.1 Non-Decision Point (NDP) States...10-1410.3.2.2.2

EZ-USB FX2 Technical Reference ManualPage 3-2 EZ-USB FX2 Technical Reference Manual v2.11. If no off-chip memory (either on the I²C-compatible bus or

Chapter 3. Enumeration and ReNumeration™ Page 3-33.3 The Default USB DeviceThe Default USB Device consists of a single USB configuration containing o

EZ-USB FX2 Technical Reference ManualPage 3-4 EZ-USB FX2 Technical Reference Manual v2.13.4 EEPROM Boot-load Data FormatsThis section describes three

Chapter 3. Enumeration and ReNumeration™ Page 3-53.4.2 Serial EEPROM Present, First Byte is 0xC0If, at power-on reset, the FX2 detects an EEPROM conn

EZ-USB FX2 Technical Reference ManualPage 3-6 EZ-USB FX2 Technical Reference Manual v2.13.4.3 Serial EEPROM Present, First Byte is 0xC2If, at power-o

Chapter 3. Enumeration and ReNumeration™ Page 3-7Bytes 1-6 of a C2 EEPROM can be loaded with VID / PID / DID bytes if it is desired at some point to r

EZ-USB FX2 Technical Reference ManualPage 3-8 EZ-USB FX2 Technical Reference Manual v2.13.5 EEPROM Configuration ByteThe configuration byte is valid f

Chapter 3. Enumeration and ReNumeration™ Page 3-93.6 The RENUM BitAn FX2 control bit called “RENUM” (ReNumerated) determines whether USB device reque

EZ-USB FX2 Technical Reference ManualPage 3-10 EZ-USB FX2 Technical Reference Manual v2.13.7 FX2 Response to Device Requests (RENUM=0)Table 3-6 shows

Chapter 3. Enumeration and ReNumeration™ Page 3-113.8 FX2 Vendor Request for Firmware LoadPrior to ReNumeration, the host downloads data into the FX2’

Table of Contentsvii(Table of Contents)Chapter 12. Instruction Set 12.1 Introduction...

EZ-USB FX2 Technical Reference ManualPage 3-12 EZ-USB FX2 Technical Reference Manual v2.1These upload and download requests are always handled by the

Chapter 4. Interrupts Page 4-1Chapter 4 Interrupts4.1 IntroductionThe EZ-USB FX2’s interrupt architecture is an enhanced and expanded version of the

EZ-USB FX2 Technical Reference ManualPage 4-2 EZ-USB FX2 Technical Reference Manual v2.14.2 SFRsThe following SFRs are associated with interrupt cont

Chapter 4. Interrupts Page 4-3Table 4-3. IP Register — SFR 0xB8Bit FunctionIP.7Reserved. Read as 1.IP.6 PS1 - Serial Port 1 interrupt priority contro

EZ-USB FX2 Technical Reference ManualPage 4-4 EZ-USB FX2 Technical Reference Manual v2.1Table 4-5. EICON Register — SFR 0xD8Bit FunctionEICON.7SMOD1 -

Chapter 4. Interrupts Page 4-54.2.1 803x/805x CompatibilityThe implementation of interrupts is similar to that of the Dallas Semiconductor DS80C320.

EZ-USB FX2 Technical Reference ManualPage 4-6 EZ-USB FX2 Technical Reference Manual v2.14.3 Interrupt ProcessingWhen an enabled interrupt occurs, the

Chapter 4. Interrupts Page 4-74.3.1.1 Interrupt PrioritiesThere are two stages of interrupt priority: assigned interrupt level and natural priority.

EZ-USB FX2 Technical Reference ManualPage 4-8 EZ-USB FX2 Technical Reference Manual v2.14.3.2 Interrupt SamplingThe internal timers and serial ports

Chapter 4. Interrupts Page 4-94.4.2 USB InterruptsTable 4-10 shows the 27 USB requests that share the USB Interrupt. Figur e4-1 shows the USB Interr