
EZ-USB FX2 Technical Reference Manual
Page 5-4 EZ-USB FX2 Technical Reference Manual v2.1
Note that
only
the data-memory space is reserved;
program
memory in the 0xE000-0xFFFF range
is not reserved, so the 128-pin FX2 can access off-chip program memory in that range.
5.3.1 56- and 100-pin FX2
The 56- and 100-pin FX2 chips have no facility for adding off-chip program or data memory. There-
fore, the Main RAM must serve as both program and data memory. To accomplish this, the FX2
reads the Main RAM using the logical OR of the PSEN and RD strobes. It is the responsibility of
the system designer to ensure that the program- and data-memory spaces do not overlap; with
most C compilers, this is done by using linker directives that place the code and data modules into
separate areas.
5.3.2 128-pin FX2
It is possible to add off-chip program and data memory to the 128-pin FX2; the organization of that
memory depends on the state of the EA (External Access) pin.
EA = 0
The Main RAM is accessible both as program and data memory, just as in the 56- and 100-pin
FX2.
To avoid conflict with the Main RAM, the pins which control access to off-chip memory (the RD
,
WR
, CS, OE, and PSEN pins) are inactive whenever the FX2 accesses addresses 0x0000-
0x1FFF. This allows a 64K memory chip (data and/or program) to be added without requiring addi-
tional external logic to inhibit access to the lower 8K of that chip. Note that the PSEN and RD sig-
nals are available on separate pins, so the program and data spaces outside the FX2 are not
combined as they are inside the FX2.
When code in the range 0x0000-0x1FFF is fetched from the on-chip RAM, the PSEN
pin is not
asserted; when code is fetched from program memory in the range 0x2000-0xFFFF, the PSEN
pin
is
asserted.
EA = 1
All program memory is off-chip; all on-chip RAM, including the Main RAM, is data memory only.
The FX2 reads all on-chip RAM using only the RD strobe; the combining of RD and PSEN is dis-
abled, so the on-chip RAM becomes data memory only. All program memory is off-chip; accesses
to the lower 8K of off-chip program memory are not inhibited.
Any code fetch will assert the PSEN
pin.
After a power-on-reset, the FX2 immediately begins executing code at address 0x0000 in the off-
chip program memory, rather than waiting for an EEPROM load or USB code download to com-
plete (see Chapter 7 "Resets" for a full description of the FX2 resets).
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