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Chapter 10. General Programmable Interface (GPIF) Page 10-11
10.3 Programming the GPIF Waveforms
Each GPIF Waveform Descriptor can define up to 7 States. In each State, the GPIF can be pro-
grammed to:
Drive (high or low) or float the CTL outputs
Sample or drive the FIFO Data bus
Increment the value on the GPIF Address bus
Increment the pointer into the current FIFO
Trigger a GPIFWF (GPIF Waveform) interrupt
Additionally, each State may either sample any two of the following:
The RDYx input pins
A FIFO flag
The INTRDY (internal RDY) flag
The Transaction-Count-Expired flag
then AND, OR, or XOR the two terms and branch on the result to any State
or:
Delay a specified number [1-256] of IFCLK cycles
States which sample and branch are called “Decision Points” (DPs); States which don’t are called
“Non-Decision Points” (NDPs).
Figure 10-6. GPIF State Machine Overview
trig
(up to 7 programmable states)
and
GPIF State Machine
INTRDY bit
GPIFWF ISR
Event
Firmware Hooks
State X
State Y
NDP DP
State 7
State 7
IDLE
IDLE
CPU
Y
where:
1
6
(reserved)
CPU GPIF
X = Y-1
(A
LFunc
B)
{
AND,
OR,
XOR
}
Done
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