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7.1.1.5 ii_quixote_sbsram

Supported Platforms: Quixote

Description:

This component provides an interface from the application logic to synchronous burst SRAM

memories on Quixote. These memory devices are frequently used as buffer memory for Quixote

logic applications. Quxiote implements four total SRAM devices organized as two 32-bit SRAMs.

The maximum data rate to the SRAM is 512MB/s when a 133 Mhz clock is used for the SRAM.

This component is based upon Xilinx XAPP136 and provides a random-access interface to the

SRAM using the SRAM controller. The logic main implements the proper pipeline for the control

signal and data so that the user has a simple read/write interface to the RAM.

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