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Space

Address (Hex) Description Logic

Device

R/W CE Type

0x80520000 SBSRAM 0 Data Virtex2 R/W Async

0x80540000 SBSRAM 1 Data Virtex2 R/W Async

0x80560000 PMC J4 test port Virtex2 R Async

0x80580000 Misc Status Virtex2 R Async

0x805A0000 A/D FIFO status Virtex2 R Async

0x805C0000 Event Log Virtex2 R/W Async

ACE1 0x90000000 A/D FIFO data Virtex2 R Burst

0x90000000 D/A FIFO data Virtex2 W Burst

ACE2 0xA000000 Not used - - -

ACE3 0xB000000 Not used - - -

Table 6: Quixote Memory Map

Note that the peripherals in the logic are mapped to different CE spaces according to the type of

memory interface that will be used. The faster data paths for the A/D and DAC FIFOs are in a

separate memory space, ACE1, than the slower configuration, control and status registers

mapped to ACE0. When you add devices to the design, it is a good idea to follow this mapping

technique so that the logic timing is easier to meet for decoding high performance devices.

In the top level of the logic design, the memory mappings equate directly to the decoded memory

devices from the ii_quixote_dsp_emif_a component. The code shows simple mapping of the

registers to these memory locations Here is an example

dac_cal_gain <= dsp_a_reg(66);

that maps the DAC gain calibration register to decode 66 (decimal).

6.1.4.3 Clocks

Judicious choice of clock domain boundaries, and careful handling of any transition across the

clock boundaries is crucial to a reliable design. Past experience has shown that more problems

occur on this topic than any other.

In the Quixote design, the EMIF A clock is a 100 MHz fixed rate, with no phase relationship to

either the DAC or A/D sample clocks. In this case, a FIFO is used as the clock domain transition

for the main data path because of the ease of use and reliability. Control registers are also in the

EMIF clock domain, since most are static controls. In the case of non-static controls, signals

should handshake across the clock domain boundary. Xilinx has an excellent application note on

this topic that is worth review for general instruction in this topic.

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