
In this case, the designer was using the DSP EMIF A clock as the ChipScope core clock and had
several triggers including DSP memory decodes and software triggers. Some of the signals being
observed are shown as well such as FIFO read enables and so forth. Looks like the debug was
for some type of DSP access problem.
Once the core is in the design, you can then trigger on different conditions just as you would use a
logic analyzer. If connect up all the signals in the problem area, only one compilation is needed to
get the core into the design for debug. Once you get it all working, you have a logic analyzer
inside the FPGA. Here’s sample view.
5.5.3 Debugging in MATLAB Simulink
The most common way to debug a MATLAB design is to use the hardware gateways to get data
between the design environment and the hardware. By adding a few observation points, you can
usually spot the problem area for most problems. You can also inject test waveforms into the
system to help find the problems.
Since MATLAB designs are normally implemented with a single system clock that all application
logic uses, timing problems tend to be minimized. Its a lot more common in MATLAB designs to
have data format problems. Keep in mind that MATLAB works in double precision, so you will
have to use data formatters frequently to get the data you expect in the real hardware. The design
is bit-true and cycle-true as implemented, but using it with MATLAB can be tricky to get the data
formats correct.
One of the most common method we use to find problems in the real hardware is to use an
SRAM for data capture of the real-time data, or to generate real-time data into the system.
Several of the examples show this technique. This technique allows you to capture real-time data
then analyze it in MATLAB. You can also build a logic analyzer this way by recording the states
into the RAM based on a trigger in the logic. See the sram_sinewave_fast_access_test example
in Quixote for a sample of this or a similar one for the hardware you are using.
ChipScope tends to be less useful in MATLAB debugging since the net names are not known and
can be hard to trace.
Innovative Integration FrameWork Logic User Guide 45
Illustration 42: Xilinx ChipScope in Use
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