Cypress Semiconductor Quad HOTLink II CYV15G0404RB Guia do Utilizador Página 86
- Página / 92
- Índice
- MARCADORES
- Quad Independent Channel 1
- HOTLink II™ CYV15G0404DXB 1
- Video PHY Demonstration Board 1
- Users Guide 1
- Page 2 of 92 2
- Page 3 of 92 3
- LIST OF TABLES 4
- 1.0 Introduction 5
- 2.0 Kit Contents 5
- 3.0 Demo Board Features 6
- 4.0 Board Architecture 7
- 4.2 Clocking Architecture 8
- Programmable 10
- 4.4 Power Supply 11
- 5.0 GUI and Operating Modes 12
- [+] Feedback 13
- 5.1 Setting the SDI Data Rate 14
- 5.3 Standard 15
- 5.4 Transmit Test Pattern 16
- 5.5 Status 16
- 6.0 Sample Test Procedures 17
- 6.3 Tests 19
- Page 23 of 92 23
- Page 24 of 92 24
- Page 27 of 92 27
- Page 28 of 92 28
- 7.0 Summary 29
- 8.0 References 29
- Linear Syst ems Ltd 33
- Page 36 of 92 36
- Page 38 of 92 38
- (GERBER Files) 43
- Page 45 of 92 45
- Figure B-2. Top Overlay 45
- Page 64 of 92 64
- (Drill and Assembly) 65
- Page 66 of 92 66
- Figure C-1. Drill Placement 66
- Page 67 of 92 67
- Figure C-2. Assembly–Top View 67
- Page 68 of 92 68
- Video Demo Board 69
- Setting Configurations 85
- SD-SDI to HD-SDI Upconversion 86
- Channel B 87
- Channel A 87
- FPGA (U2) 87
- Board Modification 88
- FPGA(U2) 89
- PLL 1 PLL 2 JP11 89
- Page 91 of 92 91
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