Cypress Semiconductor CY14B256K Especificações

CY14B256K256 Kbit (32K x 8) nvSRAM with Real Time ClockCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600

CY14B256KDocument Number: 001-06431 Rev. *G Page 10 of 24Table 3. RTC Register MapRegisterBCD Format DataFunction/RangeD7 D6 D5 D4 D3 D2 D1 D00x7FFF

CY14B256KDocument Number: 001-06431 Rev. *G Page 11 of 240x7FFBTime Keeping - HoursD7 D6 D5 D4 D3 D2 D1 D012/24 0 10s Hours HoursContains the BCD val

CY14B256KDocument Number: 001-06431 Rev. *G Page 12 of 240x7FF6Interrupt Status/ControlD7 D6 D5 D4 D3 D2 D1 D0WIE AIE PFIE 0 H/L P/L 00WIE Watchdog I

CY14B256KDocument Number: 001-06431 Rev. *G Page 13 of 240x7FF0FlagsD7 D6 D5 D4 D3 D2 D1 D0WDFAF PFOSCF0CALW RWDF Watchdog Timer Flag. This read only

CY14B256KDocument Number: 001-06431 Rev. *G Page 14 of 24Maximum RatingsExceeding maximum ratings may impair the useful life of thedevice. These user

CY14B256KDocument Number: 001-06431 Rev. *G Page 15 of 24CapacitanceThese parameters are guaranteed but not tested. Parameter Description Test Condit

CY14B256KDocument Number: 001-06431 Rev. *G Page 16 of 24AC Switching Characteristics ParameterDescription25 ns Part 35 ns Part 45 ns PartUnitMin Max

CY14B256KDocument Number: 001-06431 Rev. *G Page 17 of 24AutoStore or Power Up RECALLParameter DescriptionCY14B256KUnitMin MaxtHRECALL [15]Power Up R

CY14B256KDocument Number: 001-06431 Rev. *G Page 18 of 24RTC CharacteristicsParameter Description Test Conditions Min Max UnitIBAK [23]RTC Backup Cur

CY14B256KDocument Number: 001-06431 Rev. *G Page 19 of 24Figure 7. SRAM Write Cycle 1: WE Controlled [26, 27]Figure 8. SRAM Write Cycle 2: CE Contr

CY14B256KDocument Number: 001-06431 Rev. *G Page 2 of 24Pin ConfigurationsPin DefinitionsPin Name IO Type DescriptionA0–A14Input Address Inputs. Used

CY14B256KDocument Number: 001-06431 Rev. *G Page 20 of 24Figure 9. AutoStore/Power Up RECALLFigure 10. CE Controlled Software STORE/RECALL Cycle [1

CY14B256KDocument Number: 001-06431 Rev. *G Page 21 of 24Figure 11. OE Controlled Software STORE/RECALL Cycle [19]Figure 12. Soft Sequence Processi

CY14B256KDocument Number: 001-06431 Rev. *G Page 22 of 24Part Numbering NomenclatureCY 14 B 256 K - SP 25 X C T Option:T-Tape and ReelBlank - Std.Spe

CY14B256KDocument Number: 001-06431 Rev. *G Page 23 of 24Ordering InformationAll the below mentioned parts are Pb-free. Shaded areas contain advance

Document Number: 001-06431 Rev. *G Revised May 05, 2008 Page 24 of 24PSoC Designer™, Programmable System-on-Chip™, and PSoC Express™ are trademarks a

CY14B256KDocument Number: 001-06431 Rev. *G Page 3 of 24Device OperationThe CY14B256K nvSRAM consists of two functionalcomponents paired in the same

CY14B256KDocument Number: 001-06431 Rev. *G Page 4 of 24During any STORE operation, regardless of how it is initiated,the CY14B256K continues to driv

CY14B256KDocument Number: 001-06431 Rev. *G Page 5 of 24Noise ConsiderationsThe CY14B256K is a high speed memory. It must have a highfrequency bypass

CY14B256KDocument Number: 001-06431 Rev. *G Page 6 of 24Clock OperationsThe Clock registers maintain time up to 9,999 years in onesecond increments.

CY14B256KDocument Number: 001-06431 Rev. *G Page 7 of 24To determine how to set the calibration, one may set the CAL bitin the Flags register at 0x7F

CY14B256KDocument Number: 001-06431 Rev. *G Page 8 of 24InterruptsThe CY14B256K provides three potential interrupt sources.They include the watchdog

CY14B256KDocument Number: 001-06431 Rev. *G Page 9 of 24.Figure 4. RTC Recommended Component ConfigurationWDF - Watchdog Timer FlagWIE - Watchdog In