Cypress Semiconductor CY7C1354CV25 Manual do Utilizador descarregar pdf (Página 21)

CY7C1354CV25

CY7C1356CV25

Document Number: 38-05537 Rev. *M Page 21 of 33

SB3

Automatic CE power-down

current — CMOS inputs

Max V

, device deselected,

 0.3 V or V

> V

DDQ

0.3 V,

f = f

MAX

= 1/t

CYC

4-ns cycle,

250 MHz

–120mA

5-ns cycle,

200 MHz

–110mA

6-ns cycle,

166 MHz

–100mA

SB4

Automatic CE power-down

current — TTL inputs

Max V

, device deselected,

 V

or V

 V

, f = 0

All speed

grades

–40mA

Electrical Characteristics (continued)

Over the Operating Range

Parameter

[17, 18]

Description Test Conditions Min Max Unit

Capacitance

Parameter

[19]

Description Test Conditions

100-pin TQFP

Max

119-ball BGA

Max

165-ball FBGA

Max

Unit

Input capacitance T

= 25 °C, f = 1 MHz,

= 2.5 V, V

DDQ

= 2.5 V

555pF

CLK

Clock input capacitance 5 5 5 pF

I/O

Input/output capacitance 5 7 7 pF

Thermal Resistance

Parameter

[19]

Description Test Conditions

100-pin TQFP

Package

119-ball BGA

Package

165-ball FBGA

Package

Unit



Thermal resistance

(junction to ambient)

Test conditions follow

standard test methods and

procedures for measuring

thermal impedance, per

EIA/JESD51.

29.41 34.1 16.8 °C/W



Thermal resistance

(junction to case)

6.13 14 3.0 °C/W

AC Test Loads and Waveforms

Figure 4. AC Test Loads and Waveforms

OUTPUT

R = 1667 

R = 1538 

5pF

INCLUDING

JIG AND

SCOPE

(a) (b)

OUTPUT

= 50 

= 1.25 V

2.5 V

ALL INPUT PULSES

DDQ

GND

90%

10%

90%

10%

 1 ns

(c)

2.5 V I/O Test Load

Note

19. Tested initially and after any design or process change that may affect these parameters.

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 32 33

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