
Document Number: 38-05537 Rev. *M Page 17 of 33
TAP DC Electrical Characteristics and Operating Conditions
(0 °C < T
A
< +70 °C; V
DD
= 2.5 V ± 0.125 V unless otherwise noted)
Parameter
[16]
Description Test Conditions Min Max Unit
V
OH1
Output HIGH voltage I
OH
= –1.0 mA, V
DDQ
= 2.5 V 2.0 – V
V
OH2
Output HIGH voltage I
OH
= –100 µA, V
DDQ
= 2.5 V 2.1 – V
V
OL1
Output LOW voltage I
OL
= 8.0 mA, V
DDQ
= 2.5 V – 0.4 V
V
OL2
Output LOW voltage I
OL
= 100 µA V
DDQ
= 2.5 V – 0.2 V
V
IH
Input HIGH voltage V
DDQ
= 2.5 V 1.7 V
DD
+ 0.3 V
V
IL
Input LOW voltage V
DDQ
= 2.5 V –0.3 0.7 V
I
X
Input Load current GND < V
IN
< V
DDQ
–5 5 µA
Identification Register Definitions
Instruction Field CY7C1354CV25 CY7C1356CV25 Description
Revision number (31:29) 000 000 Reserved for version number.
Cypress device ID (28:12) 01011001000100110 01011001000010110 Reserved for future use.
Cypress JEDEC ID (11:1) 00000110100 00000110100 Allows unique identification of SRAM vendor.
ID register presence (0) 1 1 Indicate the presence of an ID register.
Scan Register Sizes
Register Name Bit Size (× 36) Bit Size (× 18)
Instruction 3 3
Bypass 1 1
ID 32 32
Boundary scan order (119-ball BGA package) 69 69
Boundary scan order (165-ball FBGA package) 69 69
Instruction Codes
Instruction Code Description
EXTEST 000 Captures the input/output ring contents. Places the boundary scan register between the TDI
and TDO. Forces all SRAM outputs to high Z state.
IDCODE 001 Loads the ID register with the vendor ID code and places the register between TDI and TDO.
This operation does not affect SRAM operation.
SAMPLE Z 010 Captures the input/output contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a high Z state.
RESERVED 011 Do Not Use: This instruction is reserved for future use.
SAMPLE/PRELOAD 100 Captures the input/output ring contents. Places the boundary scan register between TDI and
TDO. Does not affect the SRAM operation.
RESERVED 101 Do Not Use: This instruction is reserved for future use.
RESERVED 110 Do Not Use: This instruction is reserved for future use.
BYPASS 111 Places the bypass register between TDI and TDO. This operation does not affect SRAM
operation.
Note
16. All voltages referenced to V
SS
(GND).
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