Cypress Semiconductor CY2291 Manual do Utilizador Página 8

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CY2291/CY2291F/CY2291I
CY2292/CY2292F/CY2292I
CY2295/CY2295I
8
CIRCLE ONE CY2291 CY2292 CY2295
Company Engineer FAE/Sales
Phone# Fax#
CY2291/2/5 CUSTOM CONFIGURATION REQUEST FORM
3.3V 5.0V
If a different reference is required, specify the frequency in the box to the right
(must be between 10 MHz and 25 MHz for crystal, 1 MHz and 30 MHz for external clock):
Requested Actual
Select
S2 S1 S0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
UPLL
5. OUTPUT CONFIGURATION (“Off”is a valid selection for any output and will automatically be entered for blanks.)
Assign by number from the Output Options Table below and fill in the Frequency column as a double-check.
Output Options Table
1.Ref 6. CPLL/2 11.UPLL/4 16.SPLL/4 21. SPLL/12 26.SPLL/40
2. Ref/2 7. CPLL/4 12.UPLL/8 17.SPLL/5 22. SPLL/13 27.SPLL/48
3. Ref/4 8. CPLL/8 13.SPLL 18.SPLL/6 23.SPLL/20 28. SPLL/52
4. Ref/8 9. UPLL 14. SPLL/2 19.SPLL/8 24. SPLL/24 29.SPLL/96
5. CPLL 10. UPLL/2 15. SPLL/3 20.SPLL/10 25. SPLL/26 30.
SPLL/104
CLKA (Options 1– 30,Off)
CLKB (Options 1– 30,Off)
CLKC (Options 1– 30,Off)
CLKD (Options 1– 30,Off)
For CLKD only: option #4 (Ref/8) is replaced with Ref/3.
CPUCLK (Options 5–7, Off)
XBUF (Option 1
only)
CLKF (Options 14–16, Off)
6. SHUTDOWN OPTION (Circle Yes or No)
7. SUSPEND OPTION (Circle Yes or No)
IF SUSPEND = “Yes”:Circle each resource to be shut
down when the Suspend mode is active (S2=0). Note that
suspending a PLL automatically suspends its outputs.
CLKA
CLKB
CLKC
CLKD
XBUF
CPUCLK
CLKF
CPU-PLL
UTIL-PLL
SYS-PLL
Yes
Yes
No
No
Date
32K (Fixed 32 kHz)
Option FrequencyOption Frequency
32.768kHz
1
Range: 8–100 MHz at 5V; 8–80 MHz at 3.3V
Requested
Actual
SPLL
Default = 96 MHz at 5V; 48 MHz at 3.3V
Requested
Actual
4. UTILITY-PLL (UPLL) AND SYSTEM-PLL (SPLL) FREQUENCIES (“Off” is a valid frequency selection for either PLL.)
To minimize harmonic effects, avoid setting any PLL to an equal or multiple frequency of another PLL.
3. CPU-PLL (CPLL) FREQUENCIES (“Off” is a valid selection for any address and will automatically be entered for blanks.)
2. INPUT REFERENCE FREQUENCY (Circle one) 14.31818 MHz (Default)
1. OPERATING VOLTAGE (Circle
one)
32K andCLKFare not available on the CY2292.
Range: 8–100 MHz at 5V; 8–80 MHz at 3.3V (Commercial)
Range: 8–100 MHz at 5V; 8–80 MHz at 3.3V (Commercial)
Crystal External Clock
If the Suspend Option is specified in #7 below, the Select MSB
(S2) serves a dual function as both the MSB CPU address
and as the Suspend select pin. The CPU frequencies speci-
fied for addresses 000–011 will be active unless the CPU-PLL
is shut down during the suspend mode (CPU-PLL is circled
in #7). Also, any outputs derived from a non-suspended
CPU-PLL (assigned in #5 as options 5–8) that are not circled
in #7 will remain active during the suspend mode.
The CY2291, CY2295, and CY2292 are the industry’s most flexible frequency synthesizers, offering a high degree of config-
urability due to their unique internal programmable EPROM array. Of the CY2291/2/5’s outputs, six (five on the CY2292) may
be defined within the scope of the PLL frequencies and divider criteria described in the following. Shaded areas are for Cypress
use only. Contact your local Cypress representative for assistance.
Customer Configuration Marking
Date Quantity
8–90 MHz at 5V, 8–66.6 MHz at 3.3V (Industrial/Field-Prog)
FOR CYPRESS USE ONLY (Shaded Areas above and below)
890 MHz at 5V, 866.6 MHz at 3.3V (Industrial/Field-Prog)
(Commercial)
890 MHz at 5V, 866.6 MHz at 3.3V (Industrial/Field-Prog)
(Please submit to your local FAE or sales representative)
Default = 96 MHz at 5V; 48 MHz at 3.3V
Default = “Off” for all selections
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