Cypress Semiconductor CY8C21234 Manual do Utilizador descarregar pdf (Página 39)

CY8C21634/CY8C21534

CY8C21434/CY8C21334/CY8C21234

Document Number: 38-12025 Rev. *Q Page 39 of 45

Figure 28. 56-Pin (300-Mil) SSOP

Thermal Impedances

Solder Reflow Peak Temperature

Following is the minimum solder reflow peak temperature to achieve good solderability.

51-85062 *C

Table 38. Thermal Impedances per Package

Package Typical θ

[22]

Typical θ

16 SOIC 123

C/W 55

C/W

20 SSOP 117

C/W 41

C/W

28 SSOP 96

C/W 39

C/W

32 QFN

[23]

5x5 mm 0.60 MAX 27

C/W 15

C/W

32 QFN

[23]

5x5 mm 0.93 MAX 22

C/W 12

C/W

Table 39. Solder Reflow Peak Temperature

Package Minimum Peak Temperature

[24]

Maximum Peak Temperature

16 SOIC 240

C 260

20 SSOP 240

C 260

28 SSOP 240

C 260

32 QFN 240

C 260

Notes

22. T

= T

+ Power x θ

23. To achieve the thermal impedance specified for the QFN package, the center thermal pad must be soldered to the PCB ground plane

24. Higher temperatures may be required based on the solder melting point. Typical temperatures for solder are 220 ± 5

C with Sn-Pb or 245 ± 5

C with Sn-Ag-Cu

paste. Refer to the solder manufacturer specifications.

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