Cypress Semiconductor CY14B101K Especificações descarregar pdf (Página 28)

CY14B101K

Document Number: 001-06401 Rev. *J Page 28 of 29

*I 2663934 GVCH/PYRS 02/24/09 Updated Features

Updated pin definition of WE

Removed AutoStore enable/disable section

Added Best practices

Updated “Reading the clock”, “Backup Power”, “Stopping and

starting the Oscillator” and “Alarm” descriptions under RTC

operation

Modified “Figure 4. RTC Recommended Component Configu-

ration”

Added footnotes 4, 5 and 6

Added default values to RTC Register Map” table

Updated flag register description in Register Map Detail” table

Added Industrial specs for 25ns and 35ns speed

Changed V

from Vcc+0.3 to Vcc+0.5

Added “Data Retention and Endurance” table on page 15

Added Thermal resistance values

Added alternate parameters in the AC switching characteristics

table

Renamed t

to t

OHA

Changed t

HRECALL

from 20 to 40ms

Changed t

RECALL

spec from 100μs to 170μs (Including t

70us)

Renamed t

to t

Renamed t

GHAX

to t

Updated Figure 13, 14, 15 and 16

Renamed t

HLHX

to t

PHSB

Added truth table for SRAM operations

*J 2815609 GVCH 11/26/09 Added note in the Ordering Information table and watermark to

state that the parts in this data sheet are not recommended for

new designs. Added the Contents page.

Document Title: CY14B101K 1 Mbit (128K x 8) nvSRAM With Real Time Clock

Document Number: 001-06401

REV. ECN NO. Orig. of Change

Submission

Date

Description of Change

Not Recommended for New Designs

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