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CY14B256KA

Document Number: 001-55720 Rev. *H Page 7 of 28

Real Time Clock Operation

nvTIME Operation

The CY14B256KA offers internal registers that contain clock,

alarm, watchdog, interrupt, and control functions. RTC registers

use the last 16 address locations of the SRAM. Internal double

buffering of the clock and timer information registers prevents

accessing transitional internal clock data during a read or write

operation. Double buffering also circumvents disrupting normal

timing counts or the clock accuracy of the internal clock when

accessing clock data. Clock and alarm registers store data in

BCD format.

RTC functionality is described in the following sections. The RTC

0x7FFF. Refer to Table 3 on page 12 and Table 4 on page 13 for

a detailed Register Map description.

Clock Operations

The clock registers maintain time up to 9,999 years in

one-second increments. The time can be set to any calendar

time and the clock automatically keeps track of days of the week

and month, leap years, and century transitions. There are eight

registers dedicated to the clock functions, which are used to set

time with a write cycle and to read time with a read cycle. These

registers contain the time of day in BCD format. Bits defined as

‘0’ are currently not used and are reserved for future use by

Cypress.

Reading the Clock

The double buffered RTC register structure reduces the chance

of reading incorrect data from the clock. Internal updates to the

CY14B256KA time keeping registers are stopped when the read

bit ‘R’ (in the flags register at 0x7FF0) is set to ‘1’ before reading

clock data to prevent reading of data in transition. Stopping the

When a read sequence of RTC device is initiated, the update of

the user timekeeping registers stops and does not restart until a

‘0’ is written to the read bit ‘R’ (in the flags register at 0x7FF0).

After the end of read sequence, all the RTC registers are simul-

taneously updated within 20 ms.

Setting the Clock

A write access to the RTC device stops updates to the time

keeping registers and enables the time to be set when the write

bit ‘W’ (in the flags register at 0x7FF0) is set to ‘1’. The correct

day, date, and time is then written into the registers and must be

in 24 hour BCD format. The time written is referred to as the

“Base Time”. This value is stored in nonvolatile registers and

used in the calculation of the current time. When the write bit ‘W’

is cleared by writing ‘0’ to it, the values of timekeeping registers

are transferred to the actual clock counters after which the clock

resumes normal operation.

If the time written to the timekeeping registers is not in the correct

BCD format, each invalid nibble of the RTC registers continue

counting to 0xF before rolling over to 0x0 after which RTC

resumes normal operation.

Note After ‘W’ bit is set to ‘0’, values written into the timekeeping,

alarm, calibration, and interrupt registers are transferred to the

RTC time keeping counters in t

RTCp

time. These counter values

must be saved to nonvolatile memory either by initiating a

Software/Hardware STORE or AutoStore operation. While

working in AutoStore disabled mode, perform a STORE

operation after t

RTCp

time while writing into the RTC registers for

the modifications to be correctly recorded.

Backup Power

The RTC in the CY14B256KA is intended for permanently

powered operation. The V

RTCcap

or V

RTCbat

pin is connected

depending on whether a capacitor or battery is chosen for the

application. When the primary power, V

, fails and drops below

SWITCH

the device switches to the backup power supply.

The clock oscillator uses very little current, which maximizes the

backup time available from the backup source. Regardless of the

clock operation with the primary source removed, the data stored

in the nvSRAM is secure, having been stored in the nonvolatile

elements when power was lost.

During backup operation, the CY14B256KA consumes a

0.35 µA (Typ) at room temperature. The user must choose

capacitor or battery values according to the application.

Note: If a battery is applied to V

RTCbat

pin prior to V

, the chip

will draw high I

BAK

current. This occurs even if the oscillator is

disabled. In order to maximize battery life, V

must be applied

before a battery is applied to V

RTCbat

pin.

Backup time values based on maximum current specifications

are shown in the following Table 2. Nominal backup times are

approximately two times longer.

Using a capacitor has the obvious advantage of recharging the

backup source each time the system is powered up. If a battery

is used, a 3 V lithium is recommended and the CY14B256KA

sources current only from the battery when the primary power is

removed. However, the battery is not recharged at any time by

the CY14B256KA. The battery capacity must be chosen for total

anticipated cumulative down time required over the life of the

system.

Stopping and Starting the Oscillator

The OSCEN bit in the calibration register at 0x7FF8 controls the

enable and disable of the oscillator. This bit is nonvolatile and is

shipped to customers in the “enabled” (set to ‘0’) state. To

preserve the battery life when the system is in storage, OSCEN

must be set to ‘1’. This turns off the oscillator circuit, extending

the battery life. If the OSCEN bit goes from disabled to enabled,

it takes approximately one second (two seconds maximum) for

the oscillator to start.

While system power is off, if the voltage on the backup supply

RTCcap

or V

RTCbat

) falls below their respective minimum level,

the oscillator may fail.The CY14B256KA has the ability to detect

oscillator failure when system power is restored. This is recorded

in the Oscillator Fail Flag (OSCF) of the flags register at the

address 0x7FF0. When the device is powered on (V

goes

above V

SWITCH

) the OSCEN bit is checked for the ‘enabled’

status. If the OSCEN bit is enabled and the oscillator is not active

Table 2. RTC Backup Time

Capacitor Value Backup Time

0.1 F 72 hours

0.47 F 14 days

1.0 F 30 days

1 2 3 4 5 6 7 8 9 10 11 12 ... 27 28

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