
Document Number : 38-16007 Rev. *L Page 22 of 34
Table 30. Carrier Detect
Addr: 0x2F REG_CARRIER_DETECT Default: 0x00
76543210
Carrier Detect
Override
Reserved
Bit Name Description
7 Carrier Detect Override When set, this bit overrides carrier detect. The user must set Reg 0x20, bit 6=1 to enable writes to
Reg 0x2F.
6:0 Reserved These bits are reserved and should be written with zeroes.
Table 31. Clock Manual
Addr: 0x32 REG_CLOCK_MANUAL Default: 0x00
76543210
Manual Clock Overrides
Bit Name Description
7:0 Manual Clock Overrides This register must be written with 0x41 after reset for correct operation
Table 32. Clock Enable
Addr: 0x33 REG_CLOCK_ENABLE Default: 0x00
76543210
Manual Clock Enables
Bit Name Description
7:0 Manual Clock
Enables
This register must be written with 0x41 after reset for correct operation
Table 33. Synthesizer Lock Count
Addr: 0x38 REG_SYN_LOCK_CNT Default: 0x64
76543210
Count
Bit Name Description
7:0 Count Determines the length of delay in 2µs increments for the synthesizer to lock when auto synthesizer is enabled via
Control register (0x03, bit 1=0) and not using the PLL lock signal. The default register setting is typically sufficient.
Table 34. Manufacturing ID
Addr: 0x3C-3F REG_MID
313029282726252423222120191817161514131211109876543210
Address 0x3F Address 0x3E Address 0x3D Address 0x3C
Bit Name Description
31:30 Address[31:3
0]
These bits are read back as zeroes.
29:0 Address[29:0] These bits are the Manufacturing ID (MID) for each IC. The contents of these bits cannot be read unless
the MID Read Enable bit (bit 5) is set in the Analog Control register (Reg 0x20). Enabling the Manufacturing
ID register (Reg 0x3C-0x3F) consumes power. The MID Read Enable bit in the Analog Control register (Reg
0x20, bit 5) should only be set when reading the contents of the Manufacturing ID register (Reg 0x3C-0x3F).
This register is read-only.
Not Recommended for New Designs
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