Cypress Semiconductor CY7C1383D Manual do Utilizador descarregar pdf (Página 14)

CY7C1381D

CY7C1383D

Document #: 38-05544 Rev. *C Page 14 of 29

Notes:

11.All voltages referenced to V

(GND).

12.Bit #24 is “1” in the Register Definitions for both 2.5V and 3.3V versions of this device.

TAP DC Electrical Characteristics And Operating Conditions

(0°C < TA < +70°C; V

= 3.3V ±0.165V unless otherwise noted)

[11]

Parameter Description Conditions Min. Max. Unit

OH1

Output HIGH Voltage I

= –4.0 mA V

DDQ

= 3.3V 2.4 V

= –1.0 mA V

DDQ

= 2.5V 2.0 V

OH2

Output HIGH Voltage I

= –100 µA V

DDQ

= 3.3V 2.9 V

DDQ

= 2.5V 2.1 V

OL1

Output LOW Voltage I

= 8.0 mA V

DDQ

= 3.3V 0.4 V

= 8.0 mA V

DDQ

= 2.5V 0.4 V

OL2

Output LOW Voltage I

= 100 µA V

DDQ

= 3.3V 0.2 V

DDQ

= 2.5V 0.2 V

Input HIGH Voltage V

DDQ

= 3.3V 2.0 V

+ 0.3 V

DDQ

= 2.5V 1.7 V

+ 0.3 V

Input LOW Voltage V

DDQ

= 3.3V –0.3 0.8 V

DDQ

= 2.5V –0.3 0.7 V

Input Load Current GND < V

< V

DDQ

–5 5 µA

Identification Register Definitions

Instruction Field

CY7C1381D

(512K × 36)

CY7C1383D

(1M × 18) Description

Revision Number (31:29) 000 000 Describes the version number.

Device Depth (28:24)

[12]

01011 01011 Reserved for Internal Use

Device Width (23:18) 119-BGA 101001 101001 Defines memory type and architecture

Device Width (23:18) 165-FBGA 000001 000001 Defines memory type and architecture

Cypress Device ID (17:12) 100101 010101 Defines width and density

Cypress JEDEC ID Code (11:1) 00000110100 00000110100 Allows unique identification of SRAM vendor.

ID Register Presence Indicator (0) 1 1 Indicates the presence of an ID register.

Scan Register Sizes

Instruction Bypass 3 3

Bypass 1 1

ID 32 32

Boundary Scan Order (119-ball BGA package) 85 85

Boundary Scan Order (165-ball fBGA package) 89 89

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 ... 28 29

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