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Cypress Semiconductor Corporation

SL811HS and SL811HST: Application Notes

and specifications contained in this document are subject to change without

notice.

Date: 07/26/01

Revision: 1.21

Page: 23

USB Trace 1: USB Reset

4.1.5 CRC5/16 Generation

The SL811HS automatically computes and verifies all CRC5 and CRC16 by hardware. No

CRC is required to be generated or verified by external firmware.

4.1.6 Zero Length Packet

The Zero Length Packet is a NULL packet during the IN or OUT transaction phase. For

example, SL811HS will send the Zero Length Packet after a successful IN, OUT transaction to

verify that the device endpoint has successfully returned the contents of the descriptor.

Figure 4: Zero Length Data Packet

SYNC IN/OUT Token DATA1 [zero length] ACK

4.1.7 Double Buffer Operation

SL811HS memory structure is a ping-pong (double buffer) scheme. The software sequentially

sets up Data PID, Endpoint, Device Address, and Payload for each USB packet transfer. The

Data PID includes DATA0 PID and DATA1 PID. The DATA0 starts from a memory location at

0x10 and DATA1 PID starts at (DATA0 + Payload). The SL811HS provides two control

registers to setup Endpoint, and Address to USB Device. The Payload is available from 8,16,

32, 64 for Control/Interrupt/Bulk USB Transactions and up to 118-bytes for ISO transactions.

Program Sample 7: Data, Endpoint, and Address

DATA0/DATA1

Payload

Endpoint and Address

1 2 ... 18 19 20 21 22 23 24 25 26 27 28 ... 42 43

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