CY7C0850AV,CY7C0851V/CY7C0851AV
CY7C0852V/CY7C0852AV
CY7C0853V/CY7C0853AV
Document #: 38-06070 Rev. *K Page 3 of 36
Contents
Pin Configurations ........................................................... 4
Pin Definitions ..................................................................7
Master Reset .....................................................................8
Mailbox Interrupts ............................................................8
Address Counter and Mask Register Operations ..........9
Counter Reset Operation ............................................9
Counter Load Operation ..............................................9
Counter Readback Operation ......................................9
Counter Increment Operation ......................................9
Counter Hold Operation ..............................................9
Counter Interrupt .......................................................10
Retransmit .................................................................10
Mask Reset Operation ...............................................10
Mask Load Operation ................................................10
Mask Readback Operation ........................................10
Counting by Two .......................................................10
IEEE 1149.1 Serial Boundary Scan (JTAG) ..................13
Performing a TAP Reset ...........................................13
Maximum Ratings ...........................................................14
Operating Range .............................................................14
Electrical Characteristics ...............................................14
Capacitance ....................................................................14
Switching Characteristics ..............................................15
JTAG Timing ...................................................................17
Ordering Information ......................................................29
256K ×
36 (9M) 3.3 V Synchronous
CY7C0853V/CY7C0853AV Dual-Port SRAM ...................29
128K ×
36 (4M) 3.3 V Synchronous CY7C0852AV/V
Dual-Port SRAM ........................................................29
64K × 36 (2M) 3.3V Synchronous CY7C0851AV/V
Dual-Port SRAM ........................................................29
Ordering Code Definition ...........................................30
Package Diagrams ..........................................................31
Acronyms ........................................................................33
Document Conventions .................................................33
Units of Measure .......................................................33
Document History Page .................................................34
Sales, Solutions, and Legal Information ......................36
Worldwide Sales and Design Support ....................... 36
Products ....................................................................36
PSoC Solutions .........................................................36
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