Cypress Semiconductor FLEx36 CY7C0850AV Manual do Utilizador descarregar pdf (Página 11)

CY7C0850AV,CY7C0851V/CY7C0851AV

CY7C0852V/CY7C0852AV

CY7C0853V/CY7C0853AV

Document #: 38-06070 Rev. *K Page 11 of 36

Note

14. 9M device has 18 address bits, 4M device has 17 address bits, 2M device has 16 address bits, and 1M device has 15 address bits

Figure 4. Counter, Mask, and Mirror Logic Block Diagram

[14]

From

Mask

Mirror Counter

Address

Decode

RAM

Array

Wrap

Increment

Logic

Wrap

Detect

From

Mask

From

Counter

To Coun-

ter

Bit 0

Wrap

17 17

Load/Increment

CNT/MSK

CNTEN

ADS

CNTRST

CLK

Decode

Logic

Bidirectional

Address

Lines

Mask

Counter/

Address

From

Address

Lines

To Readback

and Address

Decode

MRST

1 2 ... 6 7 8 9 10 11 12 13 14 15 16 ... 35 36

Synchronous Dual-Port RAM 1
Counter Readback Operation 9
Counter Increment Operation 9
Counter Hold Operation 9
Counter Reset Operation 9
Counter Load Operation 9
CY7C0852V/CY7C0852AV 10
CY7C0853V/CY7C0853AV 10
Performing a TAP Reset 13
Units of Measure 33
Products 36
PSoC Solutions 36

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Cypress Semiconductor FLEx36 CY7C0850AV Manual do Utilizador Página 11

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