Cypress Semiconductor CYS25G0101DX-ATC Manual do Utilizador descarregar pdf (Página 14)

CYS25G0101DX

Document Number: 38-02009 Rev. *K Page 14 of 17

Typical IO Terminations

Figure 7. Serial Input Termination

Figure 8. Serial Output termination

[13]

Figure 9. TXCLKO/ RXCLK Termination

Figure 10. RXD[15:0] Termination

Figure 11. LVPECL Compliant Output Termination

OUT+

OUT–

Limiting Amp

IN+

IN–

100

Ω

0.1

CYS25G0101DX

Zo=50

Ω

Zo=50

Ω

OUT+

OUT–

CY S25G0101DX

IN+

IN–

100

Ω

0.1

Optical Module

Zo=50

Ω

Zo=50

Ω

HSTL

OUTPU

CY S25G0101DX

100

Ω

FRAMER

Zo=50

Ω

HSTL

INPUT

100

Ω

VDDQ=1.5V

HSTL

OUTPU

CY S25G0101DX FRAMER

Zo=50

Ω

HSTL

INPUT

RXD[15;0],

RXCLK,

TXCLKO

CY S25G0101DX

121

Ω

FRAMER

Zo=50

Ω

80.6

Ω

VDDQ=3.3V

OUTPUT

VDDQ=3.3V

137

Ω

LVPECL INPUT

Note

13. Serial output of CYS25G0101DX is source matched to 50

Ω

transmission lines (100

Ω

differential transmission lines).

1 2 ... 9 10 11 12 13 14 15 16 17

SONET OC-48 Transceiver 1
CYS25G0101DX 10

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