Cypress Semiconductor CY7B9911V Manual do Utilizador descarregar pdf (Página 3)

CY7B9911V

3.3V RoboClock+™

Document #: 38-07408 Rev. *B Page 3 of 12

Test Mode

The TEST input is a three-level input. In normal system

operation, this pin is connected to ground, allowing the

CY7B9911V to operate as explained briefly above (for testing

purposes, any of the three-level inputs can have a removable

jumper to ground, or be tied LOW through a 100Ω resistor.

This will allow an external tester to change the state of these

pins.)

If the TEST input is forced to its MID or HIGH state, the device

will operate with its internal phase locked loop disconnected,

and input levels supplied to REF will directly control all outputs.

Relative output to output functions are the same as in normal

mode.

In contrast with normal operation (TEST tied LOW). All outputs

will function based only on the connection of their own function

select inputs (xF0 and xF1) and the waveform characteristics

of the REF input.

Note:

4. FB connected to an output selected for “zero” skew (i.e., xF1 = xF0 = MID).

Figure 1. Typical Outputs with FB Connected to a Zero-Skew Output

[4]

– 6t

– 5t

– 4t

– 3t

– 2t

– 1t

+1t

+2t

+3t

+4t

+5t

+6t

FBInput

REFInput

– 6t

– 4t

– 3t

– 2t

– 1t

+1t

+2t

+3t

+4t

+6t

DIVIDED

INVERT

(N/A)

LL/HH

3Fx

4Fx

(N/A)

1Fx

2Fx

1 2 3 4 5 6 7 8 ... 11 12

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