Cypress Semiconductor enCoRe CY7C604XX Manual do Utilizador descarregar pdf (Página 26)

CY7C603xx

Document #: 38-16018 Rev. *D Page 26 of 29

Figure 12. Definition for Timing for Fast/Standard Mode on the I

C Bus

Packaging Information

This section illustrates the packaging specifications for the CY7C603xx device, along with the thermal impedances for each

package.

Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description

of the emulation tools’ dimensions, refer to the document titled PSoC Emulator Pod Dimensions at

http://www.cypress.com/support/link.cfm?mr=poddim.

Packaging Dimensions

Figure 13. 28-Lead (210-Mil) SSOP

SDA

SCL

Sr SP

BUFI2C

SPI2C

HDSTAI2C

SUSTOI2C

SUSTAI2C

LOWI2C

HIGHI2C

HDDATI2C

HDSTAI2C

SUDATI2C

51-85079-*C

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