Cypress Semiconductor ISR 37000 CPLD Manual do Utilizador descarregar pdf (Página 21)

Ultra37000 CPLD Family

Document Number : 38-03007 Rev. *G Page 21 of 43

Figure 14. Registered Input

Figure 15. Clock to Clock

Figure 16. Latched Input

Switching Waveforms (continued)

t

IS

REGISTERED

INPUT

INPUT REGISTER

CLOCK

t

ICO

COMBINATORIAL

OUTPUT

t

IH

CLOCK

t

WL

t

WH

INPUT REGISTER

CLOCK

OUTPUT

REGISTER CLOCK

t

SCS

t

ICS

t

IS

LATCHED INPUT

LATCH ENABLE

t

ICO

COMBINATORIAL

OUTPUT

t

IH

t

PDL

t

WL

t

WH

LATCH ENABLE

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Ultra37000 CPLD Family 1

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