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3–4 Chapter 3: Building the SOPC System

Specify the SOPC Builder System Components

Nios II System Architect Design Tutorial © June 2009 Altera Corporation

Preliminary

Add a DDR SDRAM High Performance Controller

Your system requires a high-performance memory block to act as a video frame

buffer. To add a high-performance DDR SDRAM controller to your system, perform

the following steps:

1. Under System Contents, expand Memories and Memory Controllers, expand

SDRAM, and double-click DDR SDRAM High Performance Controller.

2. On the Memory Settings tab, for Speed grade, select the correct speed grade for

your device. This tutorial assumes speed grade 6.

3. For PLL reference clock frequency, type 50 MHz.

4. For Memory clock frequency, type 150 MHz.

5. For Local interface clock frequency, select Half.

6. Under Memory Presets, scroll and click PSC A2S56D40CTP-G5 to match the DDR

SDRAM on the NEEK. Figure 3–2 shows the Memory Settings tab after you assign

these settings.

7. To keep the default settings on the PHY Settings and Controller Settings tabs,

click Finish.

8. In the Module Name column, right-click the new DDR SDRAM High Performance

Controller name, click Rename, and rename the new component ddr_sdram.

Figure 3–2. Memory Settings for DDR SDRAM High Performance Controller

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