Cypress Semiconductor CY8C21534 Especificações descarregar pdf (Página 21)

The communication can be set up to be full duplex or half duplex. There are also

options that can be exercised such as using a parity bit, character length, and a stop

bit. More modern UART connections, renamed Universal Synchronous/Asynchronous

Receiver/Transmitter (USART), have been designed to utilize clock signals. This gives

them the ability to communicate synchronously or asynchronously, eliminating the

need for start and stop bits. This helps to improve efficiency and the speed of the

data transmission.

4.2 SPI Communication

SPI connections are widely used as well these days though they are not as old as the

UART connections. The SPI connection consists of SS, MISO, MOSI, and SCK. The

speed of the SPI connection can be set for many MHz depending on the device that is

being used.

The communication of the data of the SPI connection is a full duplex shift register

system. The data is written to the register of the unit and then clocked out to the

the master to the slave and MISO is for the data coming from the slave to the master.

The registers used are usually 8 bits in length. Both sides are synchronized with the

same clock signal.

Several options are given for the SPI connection. One option is the clock polarity. This

sets whether the system sees a logical 1 or a logical 0 as the base value for the clock

signal. Also there is the clock phase. This dictates whether the register will read or

write data on the raising edge or the falling edge of the clock pulse.

The SPI connection also gives the advantage of having multiple slaves. In this

configuration the slaves all share the same MISO, MOSI, and SCK lines but have

different SS lines. A single slave unit can be singled out by holding its slave select line

to a logical 1. As the other slave’s SS lines are held to a logical 0, they will not listen to

the communications on the common lines.

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Cypress Semiconductor CY8C21534 Especificações Página 21